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NXP Semiconductors
NXP Semiconductors

Leading company in the semiconductor industry

Junior Layout Engineer at NXP Semiconductors

RoleEngineering
LevelJunior
LocationCatania
WorkOn-site
TypeFull-time
Posted1 day ago
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About the role

NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics.

NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will product world class products at a world class pace.

This team will include all key engineering disciplines in Design, Architecture, Verification, DfT and Physical Design to produce high performance and quality products.

Working in a fast-paced consumer environment, we are looking for an outstanding contributor to our Analog Layout team. This team will include support for MCU and for analog custom products being designed both in Catania but also globally.

Your Responsibilities

  • Delivering floorplan activities at IP level.
  • Participating to the power supply strategy, signals distribution between blocks.
  • Delivering Analog layout blocks.
  • Running all physical verifications as DRC/LVS/DFM and parasitic extractions to achieve high quality layout deliveries.
  • Participating to design reviews, write documentation and support for integration into products.
  • Having a strong focus on design for quality (designs are properly verified, validated, and tested for long-term reliability and zero defect).
  • Being able to leverage layout expertise to provide technical training and write technical guidelines

Your Profile

  • 0-2 years of experience leading Analog layout activities in complex ICs
  • MSEE/BSEE or working equivalent
  • Experience in Analog layouts, device physics, and IC ESD protection strategies
  • Experienced in layout design tools such as Cadence Virtuoso (OA, PVS) and Mentor Graphics (Calibre)
  • Ability to drive and collaborate with experienced people having different technical profiles
  • Experience in delivering advanced floorplan strategies
  • Experience in physical implementation in Analog blocks at IP level

Experience with cross functional teams and excellent communication skills to operate in a global environment with multiple partners in design, test, program management, quality department

More information about NXP in Italy...

Required skills

Analog layout

Floorplanning

DRC

LVS

DFM

Parasitic extraction

Documentation

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About NXP Semiconductors

NXP Semiconductors

NXP Semiconductors produces secure connectivity solutions for embedded applications.

10,001+

Employees

Eindhoven

Headquarters

$45B

Valuation

Reviews

10 reviews

3.7

10 reviews

Work-life balance

3.5

Compensation

4.0

Culture

3.8

Career

3.2

Management

3.0

72%

Recommend to a friend

Pros

Supportive management and colleagues

Innovation and interesting technology

Good work-life balance and flexible hours

Cons

Management issues and poor communication

Limited career advancement and training

Heavy workload and long hours

Salary Ranges

227 data points

Junior/L3

Intern

L3

Junior/L3 · Data Scientist

0 reports

$114,000

total per year

Base

$99,000

Stock

-

Bonus

$15,000

$96,900

$131,100

Interview experience

42 interviews

Difficulty

3.1

/ 5

Duration

14-28 weeks

Offer rate

33%

Experience

Positive 69%

Neutral 13%

Negative 18%

Interview process

1

Phone Screen

2

Technical Interview

3

Hiring Manager

4

Team Fit

Common questions

Technical skills

Past experience

Team collaboration

Problem solving