Generic Job Description:

The Digital Design Engineer is responsible for defining and realizing Digital functions on IPs, Subsystem or IC level based on required specifications. He is responsible for design, verification and evaluation of those.

Requirements:

• BSEE or equivalent is required, MSEE is a plus.

• Strong Verilog/System Verilog coding skills.

• Knowledge of ASIC front-end design flows.

• Experience of developing simple System Verilog/Verilog test benches.

Strongly desired:

• Knowledge of UVM is a desirable
• Knowledge of C/C++, Matlab, Unix/Perl Scripting or Python.
• Knowledge of digital signal processing and telecom is a plus.
• Strong analytical and problem-solving skills as well as hands-on lab debugging experiences.
• Self-motivated, excellent communication skills and ability to excel in a team environment.
• Be able to work with teams at remote locations with different time zone.

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