Internship, SI Hardware Signal & Power Integrity Engineer, SI Hardware (Winter/Spring 2027)

What to Expect

Consider before submitting an application:

This position is expected to start January 2027 and continue through Spring term (ending approximately April 2026). We ask for a minimum of 12 weeks, full-time (40 hours/week) and on-site, for most internships. Our internship program is for students who are actively enrolled in an academic program. Recent graduates seeking employment after graduation and not returning to school should apply for full-time positions, not internships.

International Students: If your work authorization is through CPT, please consult your school on your ability to work 40 hours per week before applying. You must be able to work 40 hours per week on-site. Many students will be limited to part-time during the academic year.

The Internship Recruiting Team is driven by the passion to recognize and develop emerging talent. Our year-round program places the best students in positions where they will grow technically, professionally, and personally through their experience working closely with their Manager, Mentor, and team. We are dedicated to providing an experience that allows the intern to experience life at Tesla by including them in projects that are critical to their team’s success.

Multiple Locations Possible: Palo Alto, CA; Austin, TX

What You’ll Do

• Design SOC package, PCB and system with optimized power integrity and signal integrity
• Work with cross functional team and vendors on high-speed interconnect design, including advanced packaging, connector, socket, cable, etc.
• Work with silicon, package and PCB physical design team on high-speed interfaces and power integrity layout optimization
• Work with power supply design engineers and vendors to bring up power delivery network and characterize the electrical performance
• Develop and execute test plans to validate system level and component level signal and power integrity, including interconnect channel measurement, Ser Des validation/equalization optimization, DDR shmoo validation, noise droop measurement, etc.

What You’ll Bring

• Currently pursuing a degree in Computer Engineering, Electrical Engineering, or a related field within a graduation date of May 2027 - December 2027
• Solid understanding of system and package level SI and PI, electromagnetic theory
• Prior design and SI/PI modeling experience with high-speed serial interfaces, memory interfaces, and power integrity analysis
• Familiar with lab equipment, such as oscilloscope, VNA, BERT scope, etc.
• Experience with lab correlation and validation of simulation results
• Familiar with power supply circuit design and validation is a plus
• Strong hands-on skills in data analysis, debugging and lab measurement
• Scripting in MATLAB or Python is a plus
• Ser Des/DDR IO circuit design and validation is a plus