NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics.

NXP is building new teams in Catania to create high impact micro-controllers (MCU) as part of NXP’s intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will product world class products at a world class pace.

This team will include all key engineering disciplines in Analog and Digital Design, Architecture definition, Verification, DfT and Physical Design to produce high performance and quality products.

Working in a fast-paced consumer environment, we are looking for an outstanding lead for our Analog Layout team. This team will include support for MCU and for analog custom products being designed both in Catania but also globally.

Your Responsibilities.

• Lead and execute the full digital IC design flow for complex System-on-Chip (SOC), including specification definition, architectural design, RTL coding (Verilog/System Verilog), synthesis, static timing analysis (STA), formal verification, and power analysis. Contribute to design for testability (DFT) implementation and verification.
• Collaborate closely with analog, mixed-signal, and software teams to define interfaces, optimize system performance and ensure seamless integration.
• Develop and implement innovative digital architectures and design methodologies to meet challenging performance, power, and area targets.
• Perform comprehensive design verification using simulation tools, formal verification techniques, and hardware emulation.
• Participate in post-silicon validation and debug activities, identifying and resolving issues to ensure product quality.
• Mentor junior engineers, provide technical guidance, and contribute to continuous improvement of design processes and methodologies.
• Generate detailed design documentation, including specifications, test plans, and design reviews.
• Stay abreast of industry trends, emerging technologies, and best practices in digital IC design methodology shared in the team.

Your Profile.

• Bachelor’s or Master's degree in Electrical Engineering, Electronics Engineering, or related field.
• Minimum of 5+ years of experience in digital IC design.
• Expertise in Verilog/System Verilog for RTL design and verification.
• Proven experience with industry-standard EDA tools for synthesis, STA (e.g., Synopsys Design Compiler, Cadence Genus, Primetime), formal verification (e.g., Synopsys Formality), and simulation (e.g., VCS, Questa Sim).
• Strong understanding of digital design principles, clock domain crossing (CDC) issues, power integrity, and low-power design techniques.
• Experience with scripting languages (e.g., Python, Perl, Tcl) for automation and design flow optimization.
• Familiarity with mixed-signal integration challenges and verification methodologies.
• Excellent problem-solving, analytical, and debugging skills.
• Strong communication and interpersonal skills, with the ability to work effectively in a collaborative team environment.
• Ability to take initiative, work independently, and lead technical discussions.

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