NVIDIA
NVIDIA

Senior Chip Design Verification Engineer

職種エンジニアリング
経験シニア級
勤務地Tel Aviv, Israel
勤務オンサイト
雇用正社員
掲載5ヶ月前
応募する

ポジションについて

NVIDIA is looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

  • Join Tel-Aviv/Beer-Sheva group, working on verification in the field of encryption accelerators.

  • Verification of chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area and performance.

  • Daily work will involve verification and might involve any or all aspects of chip development including micro-architecture.

  • Work closely with firmware and other groups around the globe.

  • Work mode: Hybrid home-office

What we need to see:

  • B.SC./M.SC. or equivalent experience in Electrical Engineering/Communication Engineering/Computer Engineering

  • 5+ years of validated experience in RTL Frontend ASIC verification (Chip Design)

  • High Level of English

  • Highly motivated and a team player

Ways to stand out from the crowd:

  • Knowledge in Specman

  • Knowledge and experience in the encryption field

  • Experience in RTL Frontend ASIC Design

  • Knowledge in Verilog

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry! We are an equal opportunity employer and value diversity at our company.

福利厚生

•Learning Budget

必須スキル

Design verification

SystemVerilog

UVM

Chip blocks

Specification validation

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