
Leading company in the technology industry
Distinguished Engineer - SoC Verification at Marvell
About the role
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Join Marvell's Custom Compute Solutions Business Unit (CCSBU) as we establish our design presence in San Diego's thriving semiconductor ecosystem.
This team will be responsible for delivering high‑quality customer silicon for advanced AI, XPU, and XPU‑Attach programs. By partnering closely with customers and internal stakeholders, the design center will enable Marvell’s most strategic and financially significant custom SoC initiatives, delivering differentiated solutions that reinforce Marvell’s position as a trusted partner for next‑generation compute platforms.
This is a rare foundational technical leadership opportunity - you'll help shape verification strategy from the ground up and help build a world-class team as part of our strategic expansion into Southern California. You're not joining an established local team - you're contributing to building one. You'll define the culture, establish the methodology, and shape the technical DNA of Marvell's San Diego design verification organization.
What You Can Expect
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Lead DV, emulation and post silicon validation execution with zero defect mindset.
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Define DV, emulation and post silicon validation scope.
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Define execution timelines working closely with stakeholders.
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Set goals, monitor, and take steps to keep the execution on track.
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Define DV methodology and verification strategies.
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Drive definition and implementation of DV TB architectures.
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Collaborate with Architecture, Design, DFT, PD, FW and system teams for successful product execution.
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Lead tool evaluation and selection.
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Drive continuous productivity improvements through incremental and forklift changes.
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Monitoring industry DV trends and adapting to key trends.
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Hire, build and retain high performance engineering team.
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Address continuous training and development needs of the team
What We're Looking For
Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 17+ years of related professional experience. Master’s degree in Computer Science, Electrical Engineering or related fields with 12-15+ years of experience. PhD in Computer Science, Electrical Engineering or related fields with 10-12+ years of experience.
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Expertise with System Verilog, UVM.
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Expertise with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
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Expertise with scripting language such as Python or Perl and EDA Verification tools.
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Expertise with Object-Oriented Design and implementation.
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Expertise with Linux O.S.
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Excellent programming skills, especially C++ and ARM assembly.
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Expertise with various networking protocols.
Expected Base Pay Range (USD)
212,100 - 314,020, $ per annum
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
Required skills
SoC verification
UVM
ASIC
Technical leadership
Verification methodology
Debug
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About Marvell

Marvell
PublicMarvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.
5,001-10,000
Employees
Santa Clara
Headquarters
$15.2B
Valuation
Reviews
10 reviews
4.0
10 reviews
Work-life balance
4.2
Compensation
3.5
Culture
4.1
Career
3.2
Management
3.4
75%
Recommend to a friend
Pros
Supportive team and leadership
Good work-life balance and flexibility
Collaborative and inclusive environment
Cons
Management issues and disorganization
Limited career advancement opportunities
High workload and stress
Salary Ranges
16 data points
Junior/L3
Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II
1 reports
$111,800
total per year
Base
$86,000
Stock
-
Bonus
-
$111,800
$111,800
Interview experience
1 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Offer rate
100%
Experience
Positive 100%
Neutral 0%
Negative 0%
Interview process
1
Application Review
2
Recruiter Call
3
Technical Screen
4
Final Round Interview
5
Offer Decision
Common questions
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
UI/UX Design Principles
Latest updates
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