HCL Technologies
HCL Technologies

Senior Design Lead

職種組み込み
経験シニア級
勤務地Bangalore, India
勤務オンサイト
雇用正社員
掲載1ヶ月前
応募する

ポジションについて

Job Summary

Candidates with 5 to 7 years experience is mandatory
Good understanding of ASIC/SoC life cycle
Has participated in multiple ASIC/SoC verification till tapeout stage
Full chip TB Architecture definition Experience writing ASIC/SoC testplans
UVM based testbench development
1.Experience in ASIC/So

C Testbench definition:

2.Experience to Build and maintain reusable block-level and sub-system testbenches using System Verilog and the Universal Verification Methodology (UVM)."
SV functional coverage, Assertions coding
1.Expertise & hands-on experience in OVM/UVM methodologies using SV
2.Experience to Write, execute, and debug constrained-random and directed test cases based on defined test plans.
C based TB development

  1. Experience in developing TB components for SOC with C, SV
    Test case development, coding, execution, bug analysis
  2. Experience in developing TB components, including functional coverage implementation and assertion coding
  3. Experience Set up functional coverage, write system assertions (SVA), and analyze code coverage metrics to identify untested gaps in the design logic.
    3.Debug complex simulation failures using waveform viewer tools to isolate design bugs from testbench issues.
  4. Experience in SOC C based tests coding & debugging

Gate Level Simulation:

Experience in Gate level simulation & netlist debugging
Regressions, coverage analysis
Exeprince in regression failure analayiss

Functioncal and Code Coverage closure:

participate in verification closure

Experience in Perl/Shell scripting:

Education Degree: Bachelor's or Master's degree in Electronics & Communication Engineering (ECE), Electrical Engineering (EE), VLSI Design, or a closely related field

Core Technical Skills:

Languages: Proficiency in Verilog, System Verilog, and core concepts of UVM.
Digital Logic: Strong foundational knowledge in digital logic design, finite state machines (FSM), FIFO architectures, and clocking concepts.
EDA Tools: Familiarity with industry-standard simulation and debugging tools (e.g., Synopsys VCS, Siemens Questa Sim, Cadence Xcelium/Verdi).
Protocols: Deep, authoritative knowledge of high-speed protocols (e.g., SPI, I2C,PCIe, NVMe, Ethernet, USB) or complex bus architectures (e.g., AMBA AXI/CHI/ACE)."
Scripting: Basic comfort working in a Linux environment and using scripting languages like Python, Tcl, or Perl for automation.

Key Responsibilities

  1. To leverage design expertise to ensure that software and products exhibit user-friendliness, intuitiveness, and alignment with user expectations, contributing to the creation of seamless user experiences.

  2. To lead a team of designers, provide guidance, and ensuring the delivery of high-quality design solutions in alignment with the overall business goals.

  3. To present design concepts and play a crucial role in shaping the overall design vision and strategy.

  4. To stay abreast of industry trends, emerging technologies to drive innovation and excellence in design.

Skill Requirements

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Other Requirements

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福利厚生

Learning Budget

HCL Technologiesについて

Bangalore

本社所在地