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DeepX
DeepX

[HW] SoC Design (MIPI, ISP & DSC Subsystem)

RoleEmbedded
LevelMid Level
LocationSeongnam, Gyeonggi, South Korea
WorkOn-site
TypeFull-time
Posted2 months ago
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About the role

Frontier of On-device AI Semiconductors

for Everyone, Everywhere

About DeepX Co., Ltd.

DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era.

By delivering the world’s most energy-efficient NPU technology, we are solving the critical power and heat challenges of Generative AI to bring super-intelligence to every device, everywhere.

Our global leadership is validated by our record-breaking recognition as a multi-year CES Innovation Award honoree (2024 & 2026) and being named the 2024 Frost & Sullivan Company of the Year in the NPU sector. With an enterprise value approaching 1 trillion KRW, DEEPX offers a unique pre-IPO

opportunity to join a market leader defining the new industry standard for the $70B AI semiconductor market.

We are currently scaling toward mass production of our flagship DX-M1 (Samsung 5nm) with over 50 global projects scheduled, while engineering next-generation 2nm solutions to support 100B parameter Large Language Models (LLM) at the edge. ☞ Link

★ If you want to be part of world-class innovation? Please talk with us.

★Explore our journey: The DEEPX White Paper ☞ Link

Responsibilities

  • ISP & MIPI Pipeline Integration:

Integrate ISP (Image Signal Processor) IPs with MIPI CSI-2 interfaces to establish a seamless front-end image processing pipeline.

  • Sensor Interface & Tuning Support:

Collaborate with sensor vendors to optimize data reception and initial image signal processing for AI-based vision tasks.

  • DSC IP Integration:

Integrate and verify Display Stream Compression (DSC) IP blocks into the MIPI subsystem to optimize real-time data flow and memory bandwidth.

  • Subsystem Architecture:

Design and implement the subsystem RTL to seamlessly connect MIPI interfaces, ISP pipelines, and compression IPs, ensuring robust and ultra-low power operation.

  • Cross-functional Collaboration:

Collaborate with hardware, software, and external IP vendor teams for IP evaluation, bring-up, and commercialization of AI in edge devices.

Qualifications

  • IP Integration & Verification Skills:

Proficiency in RTL implementation (Verilog/System Verilog) for subsystem integration, and strong experience in IP-level and subsystem-level verification.

  • ISP Architecture Knowledge:

Understanding of ISP pipeline stages (Demosaic, Noise Reduction, HDR, Color Correction, etc.) and experience in IP integration.

  • Sensor Interfacing:

Experience in interfacing various CMOS Image Sensors (CIS) with SoC via MIPI.

  • Compression Technology Experience:

Hands-on experience integrating video stream compression technologies (specifically VESA DSC) using 3rd-party IPs.

  • Problem-Solving:

Ability to debug complex timing issues, interface bottlenecks, and protocol violations within high-speed transmission subsystems.

Preferred Qualifications

  • Experience in applying NPU technologies to video processing tasks.

  • Previous experience in the system semiconductor or AI hardware industry.

  • Innovation & IP: Experience in filing patents or developing core IP portfolios.

  • Excellent communication skills to work with global IP vendors and partners.

Recruitment Process

  • Application Review - (Phone Interview) - Technical Interview
  • Organizational Culture Fit Interview
  • CEO Interview
  • Reference Check / Compensation Discussion

※ The recruitment process may vary depending on the position and application content.

※ Candidates with less than 3 years of experience are required to submit their academic transcripts.

Employment Type

  • Full-time (3-month probationary period with 100% compensation)

Working Hours

  • Monday to Friday, 9:00 AM – 6:00 PM (Lunch break: 12:00 PM – 1:00 PM)

Notes

  • If any false information is found in the application or onboarding documents, the job offer may be withdrawn even after confirmation.

  • A 3-month probationary period applies after joining, with no reduction in salary or benefits.

Benefits

  • 모든 정규직 입사자에게 연봉 수준의 스톡옵션 부여

  • 최신 사양 장비 및 최고의 근무 환경 제공 (최신 노트북, 높낮이 조절식 스탠딩 데스크, 모니터암, 듀얼모니터 등 제공)

  • 점심식사 + 아침 & 저녁식사 지원

  • 스낵, 아이스크림, 음료 등 사내 카페 무제한 간식 제공

  • 사우나가 포함된 피트니스 비용 지원

  • 연 1회 종합건강검진 지원 (배우자 포함)

  • 생일, 결혼기념일, 크리스마스이브 축하금 지급 및 조기퇴근 제공

  • 설/추석 명절 상여금 지급

  • 축하와 위로를 위한 경조휴가 및 경조금 지원

Benefits and perks

Equity

Paid Time Off

Free Meals

Gym Membership

Wellness Programs

Healthcare

Performance Bonus

Home Office Setup

Retirement Plan

Required skills

SoC design

RTL design

Hardware integration

Subsystem verification

Digital logic

About DeepX

㈜딥엑스 대한민국 경기도 성남시 판교역로241번길 20 미래에셋벤처타워 5층 ㈜딥엑스

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