Subsystem/SoC Level Verification Engineer

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Job Description:

Candidate would be required to work on various phases of SOC physical design activities. The job will include but not limited to block level – floor-planning, partitioning, placement, clock tree synthesis, route, physical verification (LVS/DRC/ERC/Antenna etc).

Should be able to meet congestion, timing and area metrics. Candidate would be required to do equivalence checks, STA, Crosstalk delay analysis ,noise analysis, power optimization. Should be able to implement timing and functional ECOs.

Should have excellent problem solving skill to help through congestion resolution and timing closure. Should have experience formal verification and timing analysis and ECO implementation.

Experience with tools such as Innovus/Encounter, ICC, Caliber, LEC, Primetime etc is highly desirable.

Candidate should be able to work independently and guide other team members. Should be experienced in working in a global team and dynamic environment.

Should possess ability to learn and adapt to new tools and methodologies.

Excellent communication skill is a must.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.