招聘
Join our innovative team as an Analog Integrated Circuit Design Engineer, where you will play a crucial role in designing high speed data converters and PLLs (phase locked loop) specifically for optical communication applications. Collaborating closely with cross-functional teams, you will contribute to the architecture definition, circuit design, layout. Our dynamic work environment encourages creativity and teamwork, fostering a culture of continuous learning and development. Embrace the opportunity to tackle exciting challenges that push the boundaries of technology and drive impactful innovations in the optical communication space.
- Master's degree or PhD in Electrical Engineering or equivalent practical work experience.
- Solid experience in high-speed analog CMOS (Complementary Metal-Oxide-Semiconductor) (>15GHz) and mixed-signal integrated circuit design, with fundamental concepts such as circuit noise and linearity, linear amplifiers, samplers, data converters, custom digital circuits.
- Experience in testing and debugging analog and mixed signal high-speed integrated circuits (ICs) as well as experience with physical design and verification (passive component design using industry-standard tools such as Cadence Virtuoso and EMX).
It would be nice if you also had:
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Background with silicon photonics and optical communications.
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Mixed-signal design, along with Verilog-A, AMS, System Verilog functional modeling skills.
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Matlab (or similar) modeling skills for performance modeling and test automation.
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Familiarity with digital flow (synthesis, static timing, place and route), particularly in the context of state machines for mixed-signal control systems.
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Background in wireline communication and equalization; familiarity with Ser Des (Serializer/Deserializer), CDR (clock-and-data recovery), PLL (phase locked loop), ADC (Analog to Digital Converter) and DAC (Digital-to-Analog Converter).
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Develop high-speed analogue IPs in deep sub-micron CMOS (Complementary Metal-Oxide-Semiconductor) technologies.
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Collaborate on architecture definition, circuit and layout design.
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Drive high-speed communication product development through innovative solutions.
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Stay current with advancements in CMOS (complementary metal-oxide-semiconductor), silicon photonics, and optical communications to enhance design approaches.
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关于Nokia

Nokia
PublicNokia Corporation is a Finnish multinational telecommunications, information technology, and consumer electronics corporation, originally established as a pulp mill in 1865.
10,001+
员工数
Espoo
总部位置
$24B
企业估值
评价
3.8
10条评价
工作生活平衡
3.7
薪酬
3.2
企业文化
4.1
职业发展
2.8
管理层
3.4
72%
推荐给朋友
优点
Good benefits
Supportive colleagues/management
Flexible work arrangements
缺点
Limited career advancement/growth opportunities
Management issues (poor communication, lack of direction)
Long hours/high workload
薪资范围
28个数据点
Junior/L3
Mid/L4
Junior/L3 · Global 1830 TAC Engineer
1份报告
$141,314
年薪总额
基本工资
$108,703
股票
-
奖金
-
$141,314
$141,314
面试经验
4次面试
难度
3.0
/ 5
时长
14-28周
录用率
25%
体验
正面 50%
中性 25%
负面 25%
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Interview
4
HR Follow-up
5
Offer
常见问题
Technical Knowledge
Coding/Algorithm
Behavioral/STAR
Past Experience
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