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Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Micron is awarded as a Great Place to Work! We focus on innovation through Integrity and inclusion. We are proud to have a set of core values(People, Innovation, Tenacity, Collaboration and Customer Focus) which is reflected in our culture! Micron is a diverse organization of dedicated and innovative individuals, and we provide equal opportunities to all. At Micron, we don't discriminate on the basis of race, color, religion, gender, sexual orientation, disability, identity, national origin, or status as a protected veteran.
As a Micron's ASIC DFT team we implement DFT for Micron IPs and Memory controllers(SOC) developed for different type of Storage products in Micron. We are using the best in class DFT methodologies and process technologies to ensure that we deliver the best quality products to achieve the lowest DPPM numbers.
We work closely with Design(RTL), DV, Physical Implementation team, Test Engineering and Product Engineering team to support early analysis to the Silicon bring-up and Characterization.
Required Skills and Experience :
Bachelor’s or Master’s Degree or equivalent experience in Electronics Engineering, Microelectronics, Software Engineering or a related field. The role of Senior DFT engineer require 5+ years of industry experience with shown ability in DFT of highly sophisticated SOCs :
- Core skills include Scan Codec insertion, Memory BIST and Repair implementation, Logic BIST, ATPG, BSCAN & JTAG (IEEE1149.1 & IEEE1687), Fault Simulation, ATPG Fault models(SAF, TDF, SDD, PDT etc), SDF annotated gate level verification, Scan and Memory Diagnosis.
- Must have experience with Siemens, Synopsys and/or Cadence Cad tools.
- Shall have experience in coding with Verilog, VHDL, C/C++, TCL, Perl and or Python.
Responsibilities -
- Accountable for innovative DFT implementation(Scan, MBIST, LBIST & Boundary Scan) at the RTL and Gate level for a given SOC at Hard macro and chip top level.
- Generate and validate ATPG patterns using simulations.
- Shall Validate the DFT implementation using RTL and Gate level simulation.
- Work with Multi-functional Teams on STA, Synthesis, LEC, CLP, verification & Validation.
- Support the Silicon bring up activities to guarantee the highest stability of the test patterns/program.
- Chip in to the overall DFT methodology development.
Nice to have Skills/Experience : -
- Shall have Knowledge of IEEE 1149.6, 1500 and 1838.
- Good experience on Hierarchical Scan implementations with core wrapping concepts
- Experience in handling multi-clock domains and low power design implementation.
- Knowledge/Experience on SSN, 2.5D or 3D IC DFT implementation.
- Communicate effusively with multi-functional functional teams in different geographies and time Zones.
- Time management and multi-tasking skills.
Job Location:
You will be joining part of growing team in Hyderabad or Bangalore. We value People and our dedication is to reward people with multiple Micron benefits that include PTO and medical benefits to name the few.
About Micron Technology, Inc.
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
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Micronについて

Micron
PublicMicron Technology is a global leader in memory and storage solutions, manufacturing DRAM, NAND flash memory, and solid-state drives for computing, mobile, automotive, and data center applications.
10,001+
従業員数
Boise
本社所在地
$100B
企業価値
レビュー
3.5
3件のレビュー
ワークライフバランス
2.0
報酬
4.0
企業文化
2.0
キャリア
4.0
経営陣
1.5
良い点
Good learning opportunities
High salary/good pay
Multiple positions available
改善点
Poor work-life balance
Excessive overtime
Management disagreements
給与レンジ
39件のデータ
Junior/L3
Mid/L4
Junior/L3 · Business Intelligence Analyst
1件のレポート
$115,042
年収総額
基本給
$100,037
ストック
-
ボーナス
-
$115,042
$115,042
面接体験
4件の面接
難易度
2.8
/ 5
期間
14-28週間
内定率
25%
体験
ポジティブ 25%
普通 25%
ネガティブ 50%
面接プロセス
1
Application Review
2
Recruiter/Phone Screen
3
Technical Interview
4
Final Round Interview
5
Offer
よくある質問
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
Past Experience
ニュース&話題
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