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Marvell
Marvell

Leading company in the technology industry

Design Verification Principal Engineer - SOC at Marvell

RoleEmbedded
LevelPrincipal
LocationHyderabad
WorkOn-site
TypeFull-time
Posted1 day ago
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About the role

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI,
automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those
looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell Data Centre Engineering (DCE) - Compute & Storage (CCS) BU has been at the forefront of developing and delivering leading-edge, high-
performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast‐growing product lines, Marvell
technology is powering the next‐generation data processing and workload acceleration platforms for the Carrier, Cloud/Enterprise and Automotive
Compute market segments. The team focusses on the Custom ASIC business, Cloud AI solutions & Enterprise/Career solutions including the CXL
product line.

What You Can Expect

Lead End-to-End SoC DV execution and sign-off ·

Define and drive improvements in DV processes for efficient and high-quality execution ·

Collaborate with IP, Subsystem, and SoC teams on test plan creation, testbench architecture, and milestone reviews ·

Work closely with Design and DV teams across IP, Subsystem, and SoC levels for test plan - development, execution, debug, coverage closure, and

gate-level simulations ·

Partner with Silicon bring-up and Firmware teams to support post-silicon validation and bring-up activities ·

Own and debug simulation failures to identify and resolve root causes ·

Architect and implement simulation testbenches using UVM & C.

Develop and execute test plans to verify design correctness and performance · Collaborate with logic designers for thorough verification coverage

and closure

What We're Looking For

  • BS in CS/EE with 14+ or MS with 12+ years of relevant experience
  • Experience in DV of Automotive So Cs or ARM-processor based So Cs or multimedia So Cs
  • Strong in System Verilog, UVM and IP verification
  • Excellent debug capabilities
  • Strong in use of industry-standards flows for DV tools/methodologies
  • Experience/exposure with ASIL-compliance for Fu Sa (Functional Safety) in Automotive So Cs is a plus
  • Knowledge of Unix/Linux environment and scripting (shell/perl/python) is a plus
  • Knowledge of C/C++
  • Experienced with industry standard project planning tools
  • Prior experience of key DV contributions to multiple successful SoC tape-outs in custom silicon, AI/ML product space
  • Experience with DV of multi-voltage domain, low-power and high-performance So Cs is a plus
  • Exposure/experience emulation set-up to support active debug
  • Strong technical leadership, interpersonal and communication skills
  • Must have the ability to multi-task in a fast-paced environment
  • Ability to interface internally and externally with all levels of the organization

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

Required skills

SoC verification

UVM

ASIC

Verification architecture

Coverage closure

Debug

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About Marvell

Marvell

Marvell

Public

Marvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.

5,001-10,000

Employees

Santa Clara

Headquarters

$15.2B

Valuation

Reviews

10 reviews

4.0

10 reviews

Work-life balance

4.2

Compensation

3.5

Culture

4.1

Career

3.2

Management

3.4

75%

Recommend to a friend

Pros

Supportive team and leadership

Good work-life balance and flexibility

Collaborative and inclusive environment

Cons

Management issues and disorganization

Limited career advancement opportunities

High workload and stress

Salary Ranges

16 data points

Junior/L3

Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II

1 reports

$111,800

total per year

Base

$86,000

Stock

-

Bonus

-

$111,800

$111,800

Interview experience

1 interviews

Difficulty

3.0

/ 5

Duration

14-28 weeks

Offer rate

100%

Experience

Positive 100%

Neutral 0%

Negative 0%

Interview process

1

Application Review

2

Recruiter Call

3

Technical Screen

4

Final Round Interview

5

Offer Decision

Common questions

Technical Knowledge

System Design

Behavioral/STAR

Past Experience

UI/UX Design Principles