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Marvell
Marvell

Leading company in the technology industry

Principal Hardware Design Engineer at Marvell

RoleEmbedded
LevelPrincipal
LocationSingapore
WorkOn-site
TypeFull-time
Posted1 day ago
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About the role

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As a Hardware Design Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Storage, Security, and Networking. You’ll be part of the Central engineering team designing boards for many different groups at Marvell. Additionally, Marvell designs more complex chips and boards than our competitors, for higher speeds than anyone else. We’re on the leading edge of this technology and you’ll love being a part of this.

What You Can Expect What You Will Do

  • Define system architecture for 224G and 448G PAM platforms across package, PCB, and interconnect domains
  • Lead end-to-end Signal Integrity (SI) and Power Integrity (PI) strategy to meet system performance targets
  • Drive system-level modeling methodologies, including IEEE COM and System Vue-based analysis
  • Establish and standardize correlation flows between simulation and lab measurement across teams
  • Provide technical leadership across hardware, SI, package, and system engineering functions
  • Lead complex system-level debugging and root-cause analysis activities
  • Influence design standards, best practices, and future high-speed technology directions
  • Engage with customers, vendors, and industry forums on advanced high-speed design topics

As part of the Central Engineering team, you will contribute to the design, implementation, and validation of critical SoC validation platforms. This includes defining SI specifications, developing implementation guidelines for internal and external design teams, and performing simulations to ensure high-quality design outcomes. You will collaborate closely with package design and SI teams to ensure alignment and deep understanding of package and board interactions.
This role is an individual contributor position within a multidisciplinary hardware and software organization responsible for end-to-end development

What We're Looking For

  • Bachelor’s or Master’s degree in Electrical Engineering or related field
  • Typically 10–15+ years of experience
  • Deep expertise in high-speed hardware design and system architecture
  • Strong background in Signal Integrity, Power Integrity, and channel modeling
  • Hands-on experience with PAM4 (224G and beyond) systems
  • Expert-level knowledge of System Vue, IEEE COM, and system-level simulations
  • Experience with 3D EM tools and advanced modeling techniques
  • Strong understanding of IEEE/OIF standards and compliance frameworks
  • Proven ability to lead complex, cross-functional technical initiatives

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

Required skills

Hardware architecture

Signal integrity

Power integrity

System modeling

PCB design

Interconnect design

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About Marvell

Marvell

Marvell

Public

Marvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.

5,001-10,000

Employees

Santa Clara

Headquarters

$15.2B

Valuation

Reviews

10 reviews

4.0

10 reviews

Work-life balance

4.2

Compensation

3.5

Culture

4.1

Career

3.2

Management

3.4

75%

Recommend to a friend

Pros

Supportive team and leadership

Good work-life balance and flexibility

Collaborative and inclusive environment

Cons

Management issues and disorganization

Limited career advancement opportunities

High workload and stress

Salary Ranges

16 data points

Junior/L3

Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II

1 reports

$111,800

total per year

Base

$86,000

Stock

-

Bonus

-

$111,800

$111,800

Interview experience

1 interviews

Difficulty

3.0

/ 5

Duration

14-28 weeks

Offer rate

100%

Experience

Positive 100%

Neutral 0%

Negative 0%

Interview process

1

Application Review

2

Recruiter Call

3

Technical Screen

4

Final Round Interview

5

Offer Decision

Common questions

Technical Knowledge

System Design

Behavioral/STAR

Past Experience

UI/UX Design Principles