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About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
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Develop all aspects of Application-Specific Integrated Circuit (ASIC) RTL2GDS implementation for high PPA designs.
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Manage block and full-chip level physical implementation and QoR (power, timing, area).
Minimum qualifications
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Bachelor's degree or equivalent practical experience.
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8 years of experience in areas of physical design.
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Experience in working on at least two chip tape outs.
Preferred qualifications
- Experience in high performance designs like CPUs, GPUs etc.
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About Google

Google specializes in internet-related services and products, including search, advertising, and software.
10,001+
Employees
Mountain View
Headquarters
$1,700B
Valuation
Reviews
3.7
25 reviews
Work-life balance
3.8
Compensation
4.2
Culture
3.4
Career
3.9
Management
2.8
68%
Recommend to a friend
Pros
Excellent compensation and benefits
Smart and talented colleagues
Great perks and work flexibility
Cons
Management and leadership issues
Bureaucracy and slow processes
Constantly changing priorities and reorganizations
Salary Ranges
57,502 data points
Junior/L3
L3
L4
L5
L6
L7
L8
Mid/L4
Principal/L7
Senior/L5
Staff/L6
Director
Junior/L3 · Data Scientist L3
0 reports
$176,704
total per year
Base
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Stock
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Bonus
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$150,298
$203,110
Interview experience
9 interviews
Difficulty
3.4
/ 5
Duration
14-28 weeks
Offer rate
44%
Experience
Positive 0%
Neutral 56%
Negative 44%
Interview process
1
Application Review
2
Online Assessment/Technical Screen
3
Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
Common questions
Coding/Algorithm
System Design
Behavioral/STAR
Technical Knowledge
Product Sense
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