채용
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Develop all aspects of Application-Specific Integrated Circuit (ASIC) RTL2GDS implementation for high PPA designs.
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Manage block and full-chip level physical implementation and QoR (power, timing, area).
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Bachelor's degree or equivalent practical experience.
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8 years of experience in areas of physical design.
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Experience in working on at least two chip tape outs.
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직원 수
Mountain View
본사 위치
$1,700B
기업 가치
리뷰
3.7
25개 리뷰
워라밸
3.8
보상
4.2
문화
3.4
커리어
3.9