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Staff Silicon Digital Design Engineer

Google

Staff Silicon Digital Design Engineer

Google

·

On-site

·

Full-time

·

1mo ago

Benefits & Perks

Parental leave

Health benefits

Design tool subscriptions

Remote options

Creative environment

Parental Leave

Healthcare

Required Skills

Figma

Sketch

Adobe Creative Suite

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

  • Use simulation/emulation/power analysis tools and techniques to ensure power and performance meet defined specifications.

  • Develop, implement, and maintain design blocks or components/part of a hardware product, and integrate design blocks or components/parts to create product subsystems.

  • Collaborate with cross-functional teams to debug failures (e.g., boards, software, manufacturing, design, thermal issues).

Minimum qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

  • 10 years of experience with design and multi power domains with clocking.

  • Experience in verilog or system verilog language.

Preferred qualifications

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science.
  • Experience with ASIC design methodologies for front quality checks including Lint, CDC/RDC, Synthesis, DFT ATPG/Memory BIST, UPF and Low Power Optimization/Estimation.
  • Experience in STA closure, DV test-plan review and coverage analysis of the sub-system and chip level verification.
  • Experience with chip design flow and understanding of cross domain involving DV/DFT/Physical Design/Software.
  • Knowledge of process cores, interconnects, debug and trace, security, interrupts, clocks/reset, power/voltage domains.

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About Google

Google

Google

Public

Google specializes in internet-related services and products, including search, advertising, and software.

10,001+

Employees

Mountain View

Headquarters

$1,700B

Valuation

Reviews

3.7

25 reviews

Work Life Balance

3.8

Compensation

4.2

Culture

3.4

Career

3.9

Management

2.8

68%

Recommend to a Friend

Pros

Excellent compensation and benefits

Smart and talented colleagues

Great perks and work flexibility

Cons

Management and leadership issues

Bureaucracy and slow processes

Constantly changing priorities and reorganizations

Salary Ranges

63,375 data points

Junior/L3

L3

L4

L5

L6

L7

L8

Mid/L4

Principal/L7

Senior/L5

Staff/L6

Director

Junior/L3 · Data Scientist L3

0 reports

$176,704

total / year

Base

-

Stock

-

Bonus

-

$150,298

$203,110

Interview Experience

9 interviews

Difficulty

3.4

/ 5

Duration

14-28 weeks

Offer Rate

44%

Experience

Positive 0%

Neutral 56%

Negative 44%

Interview Process

1

Application Review

2

Online Assessment/Technical Screen

3

Phone Screen

4

Onsite/Virtual Interviews

5

Team Matching

6

Offer

Common Questions

Coding/Algorithm

System Design

Behavioral/STAR

Technical Knowledge

Product Sense