About the job

As the Engineering Director for Mixed-Signal Design within the Chip Innovation and Infrastructure (CI2) team, you will lead the strategic vision and execution for the silicon components powering Google’s global data centers. You will be responsible for building, mentoring, and leading a team of silicon engineers in a fast-paced environment. Your primary focus will be the delivery of high-performance mixed-signal designs for machine-learning accelerators, achieved through high-level technical guidance and robust cross-functional management.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

The US base salary range for this full-time position is $282,000-$392,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Provide executive-level direction for CI2 mixed-signal micro-architecture and modeling, ensuring the organization meets iterative milestones and on-time delivery of specifications.

• Ensure all mixed-signal chip architectures fully align with and deliver on Google’s long-term product roadmap, balancing performance, power, cost, and deployability.

• Motivate and grow an engineering team, fostering a culture of individual growth, mobility, and 10x thinking.

• Serve as a primary bridge between silicon management and broader functional teams (verification, implementation, etc.) to facilitate a unified chip development process.

• Enable and maintain strong co-design work processes across all functions to ensure the seamless delivery of mixed-signal components to external and internal customers.

Minimum qualifications

• Bachelor’s degree in Electrical Engineering, Computer Science, or a related field.

• 15 years of experience in hardware development for distributed systems.

• 10 years of experience in analog mixed-signal development.

• Experience leading global engineering projects and managing technical teams.

Preferred qualifications

• PhD in Electrical Engineering, Computer Science, or related field.

• Experience leading technical innovation specifically within machine-learning accelerators.

• Proven ability to lead mixed-signal circuit design teams from concept to delivery on high-performance, server-class chip projects.

• Strong capability in cross-functional influencing and the ability to pivot strategies quickly in response to changing infrastructure needs.

• Effective leadership capabilities including cross-functional influencing and ability to motivate a team.

• Proven track record of taking leading-edge designs to market.