Role Overview

The Arm Solutions Engineering Physical IP group is establishing a new team focused on the architecture, design, implementation, and silicon validation of custom and semi-custom digital hard macros that bridge digital logic and analog/mixed-signal domains. These hard macros are critical building blocks used across Arm CPU, GPU, NPU, and SoC designs, where standard-cell solutions are insufficient due to power delivery, clocking, reliability, variation, or asynchronous behavior constraints.

As a Principal Design Engineer, you will provide technical ownership of complex hard-macro IP from concept through silicon, define design and implementation methodology, and mentor engineers transitioning from standard-cell and SRAM backgrounds into AMS-aware digital hard-macro development.

Key Responsibilities

• Architect, design, and deliver custom and semi-custom digital hard macros, including control logic, clocking structures, asynchronous/CDC elements, power-delivery and power-control macros, security- and reliability-critical blocks, and on-chip sensors.
• Define microarchitecture, block-level specifications, and implementation requirements for macros with mixed-signal interaction, frequency-sensitive behavior, or tunable/asynchronous characteristics.
• Develop RTL for control, clocking, power, and boundary logic, ensuring synthesis- and AMS-aware implementation.
• Drive end-to-end physical implementation, including synthesis, floorplanning, APR, STA, IR/EM analysis, and physical signoff at advanced process nodes.
• Generate and validate hard-macro deliverables for SoC integration, including Liberty timing/power models, LEF abstracts, and functional/behavioral collateral.
• Lead mixed-signal-aware design analysis, addressing metastability, jitter sensitivity, PVT variation, power-domain boundaries, and margining.
• Collaborate with verification teams on behavioral and AMS co-simulation models and robust test strategies.
• Partner closely with system architecture, AMS, DFT, SoC integration, and product engineering teams to ensure integration readiness and silicon success.
• Provide hands-on silicon exposure through hard-macro bring-up, silicon-level debug, and correlation of silicon data with pre-silicon models, driving design and methodology refinement.

Required Skills & Experience

• 12+ years of experience in custom digital or mixed-signal IP development, with ownership of multiple silicon-proven hard macros.
• Strong digital design expertise with deep understanding of analog effects impacting digital behavior (jitter, metastability, PVT sensitivity, variation).
• Hands-on experience across synthesis, APR, STA, IR/EM, and physical verification flows.
• Proven capability in system-level integration and prototyping of hard macros within digital environments.
• Strong expertise in SDC constraint development, timing exceptions, and multi-clock/asynchronous designs.
• Experience generating timing/power models and physical abstracts for delivery to SoC teams.
• Familiarity with AMS modeling and mixed-signal simulation (e.g., Verilog/SV, wreal, behavioral models).
• Demonstrated technical leadership and mentoring experience.

Preferred Qualifications

• Experience with IP requiring low-jitter clocking, security, or high-reliability constraints.
• Background in high-performance or ultra-low-power SoC IP.
• Prior exposure to standard-cell or SRAM design (beneficial but not required).

Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work: https://careers.arm.com/en/10x-mindset

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Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.