Apple is looking for a Ser Des Design and Validation Engineer to Lead system validation of mixed-signal Ser Des IP. In this highly visible role, you will contribute to the design, integration and validation of high-performance analog and mixed-signal circuits for Ser Des PHY applications. This encompasses the design and optimization of critical building blocks such as receivers, transmitters, bias generators, high-speed clock generation and distribution networks targeting best-in-class power, performance, and area metrics. A key part of your design responsibilities will include the development of analog DFT circuits and techniques essential for comprehensive PHY validation. You will develop test plans, review and analyze data to guarantee a robust IP design. You will drive and work closely with production test (e.g. ATE, system validation) teams and debug complex design and system bring-up issues.
At Apple, we strive every day to create products that enrich people's lives - a mission that brings exciting challenges in SOC/PHY design! We're looking for individuals with strong fundamentals and a proven track record to tackle complex technical problems. You are driven by curiosity, eager to learn new skills, and motivated to maximize the impact of your work. You see the big picture while diving deeply into details to innovate and solve problems. You thrive in collaborative, diverse teams, maintaining a positive spirit even when challenges arise. Above all, you care about making a difference in society and demonstrate leadership through meaningful contributions.

We have an opportunity for a forward-thinking and especially hardworking system validation engineer with strong background in high-speed serial links. As a member of our dynamic team, you will have the rare and rewarding opportunity to work on upcoming products that will surprise and delight millions of Apple's customers every day.

And all of this while enjoying a great culture where you own your career.

Description:

In this role, the key responsibilities are the following:

Ownership of Ser Des system bring-up, validation and debug. This will involve a Ser Des bring up in system environment, verifying basic operations, analyzing robustness and margins in system.

Work with design teams to understand the architecture and define DFT needs to help enhance testability and first-time silicon success.

Be involved in mixed-signal verification tasks to better understand the Ser Des operation and interaction with higher level control logic.

Preferred Qualifications:

The ideal candidate should have experience in high-speed serial links with expertise in the following:

Solid understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters.

Solid understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques.

Solid understanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops).

Hands-on experience to drive lab and production testing, debug, and data analysis

Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization.

Skills in scripting and automation to enhance efficiency are highly desirable.

Experience in high-speed serial links, with knowledge of common high-speed Ser Des protocols like PCIe, USB, DP, and MPHY.

Knowledge of Tx/Rx equalization techniques and circuits, including CTLE, DFE, and de-emphasis, as well as CDR architectures and implementations.

Knowledge of common high-speed Ser Des protocols (e.g., PCIe, USB, DP, MPHY) is highly desired.

Exposure to firmware assisted mixed signal IP development is desirable.

Knowledge and inquisitiveness in AI/ML domains, and ability to apply the concepts for improved silicon performance, and also for productivity improvements in the design/validation of the IP

Minimum Qualifications:

BS and a minimum of 10 years relevant industry experience.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

Pay & Benefits:

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.