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AMD
AMD

Together we advance.

Lead RTL Silicon Design Engineer

職種エンジニアリング
経験シニア級
勤務地Hyderabad, India
勤務オンサイト
雇用正社員
掲載3ヶ月前
応募する

福利厚生

健康保険

育児休暇

必須スキル

Verilog

SystemVerilog

C

Python

WHAT YOU DO AT AMD CHANGES EVERYTHING:

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.THE ROLE:
The focus of this role is to plan, build, and execute the design and validation of new and existing features for AMD’s DDR IPs.

THE PERSON: Collaborate with cross-functional teams to design and integrate DDR memory controller calibration solutions—including RTL logic, firmware routines, and algorithmic flows—into AMD’s system-level validation and bring-up environments. Ensure seamless interaction between hardware and firmware components, delivering reliable calibration performance aligned with silicon and platform requirements

KEY RESPONSIBILITIES:

  • Design and implement robust firmware solutions for DDR memory controller calibration across various DDR standards
  • Develop and refine calibration algorithms to ensure reliable memory initialization and operation under varying process, voltage, and temperature (PVT) conditions. Focus on improving accuracy, convergence speed, and adaptability of calibration routines
  • Create and execute validation plans to verify the correctness and performance of calibration firmware and algorithms. Perform system-level bring-up and debug activities to identify and resolve issues related to memory training and stability
  • Work closely with silicon design, verification, and system engineering teams to align calibration firmware with hardware capabilities and system requirements. Ensure seamless integration and interoperability across the full memory subsystem
  • Develop clear and comprehensive documentation for calibration flows, firmware APIs, and algorithm behavior. Ensure alignment with JEDEC specifications and internal design guidelines
  • Stay updated with emerging DDR technologies and calibration techniques. Propose and implement innovative solutions to improve calibration robustness, reduce boot time, and support next-generation memory interfaces

PREFERRED EXPERIENCE:

  • B.E/M.E/M.Tech or B.S/M.S in EE/CE with 9+ years of relevant experience
  • Digital design and experience with RTL design in Verilog/System Verilog, Knowledge of system-level architecture including buses like AXI/AHB, bridges
  • Circuit timing/STA, and practical experience with tools
  • Working knowledge of C; embedded experience a plus
  • Understanding of memory technologies such as DDR4, DDR5, LPDDR, and JEDEC standards
  • Been exposed to memory controller and PHYs from different IP vendors
  • Experienced with implementing DRAM/memory controller initialization code, memory subsystem/DDR PHYs training/calibration software
  • Version control systems such as Perforce, ICManage or Git
  • Familiar with industry standard lab tools (such as: high speed scope, compliance packages, logic analyzers) is a plus
  • Strong verbal and written communication skills
  • Should have experience working in geographically dispersed team and should be a strong team player

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering with 8+ yrs of exp

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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AMDについて

AMD

AMD

Public

Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company headquartered in Santa Clara, California.

10,001+

従業員数

Santa Clara

本社所在地

$240B

企業価値

レビュー

10件のレビュー

3.7

10件のレビュー

ワークライフバランス

2.8

報酬

3.2

企業文化

4.1

キャリア

3.4

経営陣

3.8

68%

知人への推奨率

良い点

Great team culture and spirit

Innovative projects and cutting-edge technology

Supportive management and leadership

改善点

High workload and overwhelming demands

Work-life balance challenges

High pressure and stressful deadlines

給与レンジ

6件のデータ

L2

L6

L3

L4

L5

L2 · Data Analyst L2

0件のレポート

$76,430

年収総額

基本給

$30,572

ストック

$38,215

ボーナス

$7,643

$53,501

$99,359

面接レビュー

レビュー2件

難易度

3.0

/ 5

期間

14-28週間

内定率

50%

面接プロセス

1

Application Review

2

Recruiter Screen

3

Hiring Manager Interview

4

Technical Interview

5

Offer

よくある質問

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving