
Together we advance.
ASIC Design Verification Engineer
報酬
CA$103,200 - CA$154,800
福利厚生
•育児休暇
必須スキル
Verilog
SystemVerilog
C++
WHAT YOU DO AT AMD CHANGES EVERYTHING:
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.THE ROLE:
Are you driven, inquisitive, and hungry for knowledge mind? AMD is looking for people like you to join their world class verification team delivering ASIC IP to address next generation networking and security applications. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
THE PERSON: The ideal candidate will possess a problem-solving mindset, attention to detail and the curiosity to uncover hard to find issues. A person that is yearning to be mentored by the industries best engineers to further their careers!
KEY RESPONSIBILITIES:
- Collaborate with design, architecture and physical design teams to achieve first pass silicon success
- Participate in the testbench architecture and development, test planning and writing and the debug work of leading-edge networking IP
- Execute verification strategy for cutting edge designs
- Promote and incorporate use of AI powered verification tools into daily development flow
- Implement methodology improvements to facilitate better horizontal and vertical reuse and shorter development time
PREFERRED EXPERIENCE:
- Previous experience in ASIC/FPGA verification with a track record of successful tape outs
- Experience in designing and implementing self-checking testbenches, coverage closure techniques and regression management flows
- Knowledge of modern verification practices including UVM, Formal Verification and assertion based test
- Hands on experience using AI tools for design verification
- Knowledge of communications standards (such as IEEE 802.3 Ethernet, Flex Ethernet, OTN, Interlaken, PCIe) is a plus
- Fluency in Verilog or System Verilog
- Excellent written and verbal communication skills
- Experience with VCS simulation tool, Perl/Shell scripting
- Knowledge of C/C++ is a plus
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in Computer Engineering/Electrical Engineering/Computer Science
LOCATION: Markham OR Ottawa Ontario CA
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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AMDについて

AMD
PublicAdvanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company headquartered in Santa Clara, California.
10,001+
従業員数
Santa Clara
本社所在地
$240B
企業価値
レビュー
10件のレビュー
3.7
10件のレビュー
ワークライフバランス
2.8
報酬
3.2
企業文化
4.1
キャリア
3.4
経営陣
3.8
68%
知人への推奨率
良い点
Great team culture and spirit
Innovative projects and cutting-edge technology
Supportive management and leadership
改善点
High workload and overwhelming demands
Work-life balance challenges
High pressure and stressful deadlines
給与レンジ
6件のデータ
L2
L6
L3
L4
L5
L2 · Data Analyst L2
0件のレポート
$76,430
年収総額
基本給
$30,572
ストック
$38,215
ボーナス
$7,643
$53,501
$99,359
面接レビュー
レビュー2件
難易度
3.0
/ 5
期間
14-28週間
内定率
50%
面接プロセス
1
Application Review
2
Recruiter Screen
3
Hiring Manager Interview
4
Technical Interview
5
Offer
よくある質問
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
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