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职位AMD

CPU/Cores Post‑Silicon Validation (Virtualization / Hypervisor)

AMD

CPU/Cores Post‑Silicon Validation (Virtualization / Hypervisor)

AMD

Bangalore, India

·

On-site

·

Full-time

·

1d ago

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

Role Summary:

We are looking for a Staff Engineer with strong virtualization and hypervisor fundamentals to drive post‑silicon validation of CPU cores. The engineer will leverage virtualized workloads and customer‑representative scenarios to stress core microarchitecture, identify silicon issues early, and collaborate with design, u Code/FW, BIOS, and platform teams to root‑cause and resolve issues.

This role treats virtualization as a primary validation and bug‑hunting vector, rather than a feature enablement check, to uncover real‑world core issues under production‑like stress.

Key Responsibilities:

  • Execute post‑silicon cores validation using virtualization‑based workloads and scenarios
  • Configure, deploy, and debug workloads on hypervisors (KVM, VMware, Hyper‑V, Xen) across Linux and Windows environments
  • Design and run VM‑based stress tests (migration, pause/resume, overcommit, multi‑VM contention, long‑run soak, reset scenarios) to expose core‑level bugs
  • Analyze system failures and triage issues spanning core microarchitecture, u Code, FW, BIOS, DF/UMC, and platform interactions
  • Correlate failures using logs, MCA, MSRs, debug hooks, and limited post‑silicon observability
  • Work closely with design and architecture teams to provide actionable debug data and validation feedback
  • Contribute to automation and scalable execution infrastructure for large‑scale virtualization runs
  • Track coverage, execution hours, and defect trends to ensure production‑quality readiness

Required Qualifications:

  • Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, Computer Science, or related field
  • Strong hands‑on experience with virtualization technologies and hypervisors (KVM, VMware ESXi, Hyper‑V, Xen)
  • Solid understanding of x86 CPU architecture and core microarchitectural concepts
  • Experience in Linux internals (scheduler, memory management, interrupts) and system‑level debugging
  • Familiarity with post‑silicon validation, silicon bring‑up, or system validation
  • Ability to debug complex issues across HW/SW boundaries

Preferred Qualifications:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering
  • Prior experience in CPU cores post‑silicon validation or core stress testing
  • Knowledge of microcode, BIOS, firmware, and platform initialization flows
  • Exposure to customer‑like server or client virtualization workloads
  • Experience with automation frameworks and large‑scale validation infrastructure
  • Strong data analysis and root‑cause skills for low‑frequency, long‑run failures

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

Role Summary:

We are looking for a Staff Engineer with strong virtualization and hypervisor fundamentals to drive post‑silicon validation of CPU cores. The engineer will leverage virtualized workloads and customer‑representative scenarios to stress core microarchitecture, identify silicon issues early, and collaborate with design, u Code/FW, BIOS, and platform teams to root‑cause and resolve issues.

This role treats virtualization as a primary validation and bug‑hunting vector, rather than a feature enablement check, to uncover real‑world core issues under production‑like stress.

Key Responsibilities:

  • Execute post‑silicon cores validation using virtualization‑based workloads and scenarios
  • Configure, deploy, and debug workloads on hypervisors (KVM, VMware, Hyper‑V, Xen) across Linux and Windows environments
  • Design and run VM‑based stress tests (migration, pause/resume, overcommit, multi‑VM contention, long‑run soak, reset scenarios) to expose core‑level bugs
  • Analyze system failures and triage issues spanning core microarchitecture, u Code, FW, BIOS, DF/UMC, and platform interactions
  • Correlate failures using logs, MCA, MSRs, debug hooks, and limited post‑silicon observability
  • Work closely with design and architecture teams to provide actionable debug data and validation feedback
  • Contribute to automation and scalable execution infrastructure for large‑scale virtualization runs
  • Track coverage, execution hours, and defect trends to ensure production‑quality readiness

Required Qualifications:

  • Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, Computer Science, or related field
  • Strong hands‑on experience with virtualization technologies and hypervisors (KVM, VMware ESXi, Hyper‑V, Xen)
  • Solid understanding of x86 CPU architecture and core microarchitectural concepts
  • Experience in Linux internals (scheduler, memory management, interrupts) and system‑level debugging
  • Familiarity with post‑silicon validation, silicon bring‑up, or system validation
  • Ability to debug complex issues across HW/SW boundaries

Preferred Qualifications:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering
  • Prior experience in CPU cores post‑silicon validation or core stress testing
  • Knowledge of microcode, BIOS, firmware, and platform initialization flows
  • Exposure to customer‑like server or client virtualization workloads
  • Experience with automation frameworks and large‑scale validation infrastructure
  • Strong data analysis and root‑cause skills for low‑frequency, long‑run failures

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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关于AMD

AMD

AMD

Public

Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company headquartered in Santa Clara, California.

10,001+

员工数

Santa Clara

总部位置

$240B

企业估值

评价

3.7

10条评价

工作生活平衡

2.8

薪酬

3.2

企业文化

4.1

职业发展

3.4

管理层

3.8

68%

推荐给朋友

优点

Great team culture and spirit

Innovative projects and cutting-edge technology

Supportive management and leadership

缺点

High workload and overwhelming demands

Work-life balance challenges

High pressure and stressful deadlines

薪资范围

6个数据点

L2

L3

L4

L5

L6

L2 · Data Analyst L2

0份报告

$76,430

年薪总额

基本工资

$30,572

股票

$38,215

奖金

$7,643

$53,501

$99,359

面试经验

2次面试

难度

3.0

/ 5

时长

14-28周

录用率

50%

面试流程

1

Application Review

2

Recruiter Screen

3

Hiring Manager Interview

4

Technical Interview

5

Offer

常见问题

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving