招聘
The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.
The Opportunity
At Allegro Micro Systems, we are global leaders in power and sensing solutions, and we're looking for a Senior Digital Design Engineer to help define and implement the digital architecture for our industry-leading mixed-signal motor drive ICs.
This is a unique opportunity to join a multi-site, growing, and dynamic team where you will have the autonomy to influence our technical direction and solve the most challenging problems in automotive motor control. You will be responsible for leading the architecture and design for a wide range of complex digital solutions, from standalone IP to full System-on-Chip (SoC) designs. If you are passionate about architecture and want to make a significant impact, this role is for you.
What You'll Do
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Own the Architecture: Lead the definition of system-level requirements and own the Architect and Design: Contribute to system-level requirements and design the digital architecture for complex solutions, including both IP-level and full SoC designs.
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Drive Implementation: Architect and implement complex, reusable RTL modules and contribute to top-level chip integration through the entire digital flow, ensuring adherence to best practices for low-power and high-performance design.
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Improve Our Methodology: Contribute to the evolution of our digital design methodology, helping to evaluate and deploy new tools and best practices to enhance efficiency and quality.
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Ensure Robust Validation: Work with the team on the FPGA validation and pre-silicon emulation strategy, ensuring robust verification of the entire system and a seamless hardware/software interface.
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Guarantee First-Pass Silicon Success: Partner with the verification team to define success criteria and ensure comprehensive functional coverage.
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Solve Critical Challenges: Collaborate with the physical implementation team to resolve critical timing, power, and area challenges on advanced technology nodes.
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Mentor and Collaborate: Act as a technical leader, mentoring junior engineers and collaborating effectively with peers across the team.
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Be a Technical Interface: Serve as a key technical partner to the systems, software, applications, and test engineering teams, and participate in technical discussions with key customers and EDA vendors.
Who You Are
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You hold a PhD or Master's degree (or equivalent) in Electronics or a related field, combined with extensive, proven experience in a senior digital design role.
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6+ years of experience in digital design or digital architectures, ranging from complex algorithmic IP to full SoC designs including CPU subsystems, interconnect fabrics (e.g., AMBA/AXI), and system-level protocols.
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You have a proven track record of designing and implementing complex digital IP and contributing to SoC integration from specification through to tapeout and silicon validation.
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You have a strong command of advanced digital design principles, including low-power and high-speed design techniques.
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You possess a solid understanding and practical application of advanced DFT/DFM techniques (scan compression, BIST) and FPGA/emulation for complex systems.
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You are a strong collaborator and mentor with experience guiding junior engineers.
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You have exceptional verbal and written communication skills, with the ability to present complex technical concepts to a wide range of audiences.
It's a plus if you have:
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Expertise with Cadence or equivalent EDA toolsets for the entire front-end design flow.
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Experience with functional safety standards such as ISO 26262.
Travel Requirements
- This role may require domestic and international travel up to 10-20% to support customers, vendors, and off-site design teams in Europe, the Americas, and Asia.
Why Allegro?
Join Allegro and become part of a team where your contributions truly matter.
We foster a culture of Real Innovation, empowering you to push boundaries, develop cutting-edge solutions, and drive continuous improvement.Your work will create a Real Impact by solving complex real-world challenges that fuel our success and shape the future of technology.You’ll experience Real Connection, collaborating with talented colleagues around the globe in an environment built on trust, respect, and a shared purpose.Join us—and help build what’s next.
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关于Allegro Micro

Allegro Micro
PublicAllegro MicroSystems is a semiconductor company that designs and manufactures high-performance power and sensing solutions for automotive and industrial applications.
1,001-5,000
员工数
Iowa
总部位置
$1.8B
企业估值
评价
3.7
10条评价
工作生活平衡
3.2
薪酬
3.8
企业文化
4.1
职业发展
3.4
管理层
3.1
65%
推荐给朋友
优点
Supportive management and great team culture
Collaborative work environment
Excellent health benefits and retirement plans
缺点
Heavy workload and frequent overtime
Fast-paced and stressful environment
Limited growth opportunities
薪资范围
64个数据点
Senior/L5
Senior/L5 · Senior Field Applications Engineer
1份报告
$188,500
年薪总额
基本工资
$145,000
股票
-
奖金
-
$188,500
$188,500
面试经验
48次面试
难度
3.4
/ 5
时长
14-28周
录用率
35%
体验
正面 62%
中性 24%
负面 14%
面试流程
1
Phone Screen
2
Technical Interview
3
Hiring Manager
4
Team Fit
常见问题
Technical skills
Past experience
Team collaboration
Problem solving
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