Internship, Applied AI Engineer, AI Hardware (Fall 2026/Winter 2027)

What to Expect

Consider before submitting an application:
This position is expected to start August or September 2026 and continue through fall term (ending approximately December 2026) or starting in January continuing into Winter/Spring 2027 if available. We ask for a minimum of 12 weeks, full-time (40 hours/week) and on-site, for most internships. Our internship program is for students who are actively enrolled in an academic program. Recent graduates seeking employment after graduation and not returning to school should apply for full-time positions, not internships.
International Students: If your work authorization is through CPT, please consult your school on your ability to work 40 hours per week before applying. You must be able to work 40 hours per week on-site. Many students will be limited to part-time during the academic year.
The AI Hardware team builds the silicon brains that power Full Self-Driving and Optimus. We design custom AI chips (AI5 already taped out, AI6 advancing rapidly) that deliver extreme usable intelligence per wafer, extreme power efficiency, and extreme cost efficiency so Optimus and Robotaxi can scale to millions of units.
We treat silicon development itself as an end-to-end machine intelligence problem: neural networks inside synthesis, placement, routing, and verification. Every simulation cycle becomes training data. Every constraint becomes a smarter optimizer. Every revision makes the next chip better. Hardware and software are co-designed so every transistor is maximally useful for real-world autonomy and humanoid robotics. This is first-principles engineering at the highest stakes—helping create the edge compute that lets Optimus move from demo to genuinely useful general-purpose robot.

What You’ll Do

• Design and develop AI-powered applications ranging from static timing analysis to physical synthesis optimization and automation enhancements that directly accelerate the AI5, AI6, and future chip cadence
• Build and maintain LLM-agent-based workflows for chip development. Relevant areas may include root cause analysis, coverage, scripting, etc.
• Create solutions to optimize performance, power and area optimizations, ranging from spec to RTL and RTL optimization to experimenting with novel placement algorithms
• Collaborate cross-functionally with software and hardware teams to accelerate the hardware development lifecycle and close the loop between AI models and silicon reality

What You’ll Bring

• Currently pursuing a degree in Computer Science, Computer Engineering, or a relevant field of study with an expected graduation of 2028 or earlier
• Expertise in Python and ML frameworks (Py Torch, Tensor Flow, JAX); experience with graph ML (PyG, DGL) for netlists/geometric data
• Familiarity with latest LLM agent deployment mechanisms with an eagerness to identify areas for frontier model improvement
• Ability to pick up new technologies fast (e.g. Cadence Virtuoso/Spectre, Synopsys HSPICE/Prime Time) and interest in AI-driven enhancements
• Knowledge of static timing analysis, routing, formal verification, and data pipelines for circuit/simulation datasets
• Bias for action, experimentation mindset, and ability to thrive in fast-paced, ambiguous environments