refresh

トレンド企業

トレンド企業

採用

求人Silicon Labs

IC Design Engineer II

Silicon Labs

IC Design Engineer II

Silicon Labs

Singapore

·

On-site

·

Full-time

·

1mo ago

福利厚生

Healthcare

必須スキル

Digital circuit design

RTL coding

SoC integration

Verification

Bus protocols

Communication peripherals

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated So Cs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.

What we are looking for:

You will be a technical contributor as part of a digital design team developing highly integrated mixed signal SoC’s for low power MCU and Wireless products.

Responsibilities:

  • Detailed block architecture/design of digital circuits

In-depth understanding of block requirements, system needs, and interfaces

  • Develop block specification, working with cross-functional teams to develop requirements

  • Determine appropriate design approach and partitioning

  • Implement design through RTL coding, adhering to quality guidelines

  • SoC Integration

Integration of digital blocks / IP into the SoC infrastructure

  • Development of SoC infrastructure, such as bus matrix, memory interfaces, clocking, power management, reset management

  • Integration of mixed signal and RF IP

  • Verification

Block level verification to validate block performance with adherence to requirements using directed, random, and assertion-based methods

  • SoC integration and infrastructure verification

  • Verification of mixed-signal and RF IP integration, including mixed-signal modeling and co-simulation

  • Develop embedded firmware to verify SoC Integration and Validation.

  • Documentation

Perform requirement, architecture, design, and verification reviews

  • Develop customer facing reference manual and datasheet material

Skills you will need:

Minimum Qualifications:

  • Bachelor’s or Master’s degree in Electrical Engineering, VLSI, or related field.

  • 5 years of experience

  • Knowledge on AMBA or any other Bus protocols

  • Knowledge on Communication peripherals

  • Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making

Benefits & Perks:

Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.

  • Medical and dental insurance coverage including spouse and child(ren)

  • Bi yearly health screening and flu vaccination

  • Office location is above Tai Seng MRT station

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.

総閲覧数

1

応募クリック数

0

模擬応募者数

0

スクラップ

0

Silicon Labsについて

Silicon Labs

Silicon Laboratories, Inc., commonly referred to as Silicon Labs, is a fabless global technology company that designs and manufactures semiconductors, other silicon devices and software, which it sells to electronics design engineers and manufacturers in Internet of Things (IoT) infrastructure...

1,001-5,000

従業員数

Austin

本社所在地

$5.2B

企業価値

レビュー

3.5

1件のレビュー

ワークライフバランス

3.0

報酬

3.0

企業文化

3.5

キャリア

3.5

経営陣

3.0

75%

友人に勧める

良い点

Fast-moving hiring process

No online assessment required

Casual technical interview approach

改善点

Nerve-wracking interview environment

Senior engineer observation creates pressure

Intense coding problems

給与レンジ

1件のデータ

Intern

Intern · Embedded SWE Intern

1件のレポート

-

年収総額

基本給

-

ストック

-

ボーナス

-

面接体験

1件の面接

難易度

2.0

/ 5

期間

14-28週間

内定率

100%

体験

ポジティブ 100%

普通 0%

ネガティブ 0%

面接プロセス

1

Application Review

2

Resume Screen

3

First Technical Interview

4

Second Technical Interview

5

Phone Offer

6

Official Offer

よくある質問

Coding/Algorithm

Technical Knowledge

Embedded Systems

Behavioral/STAR