
Semiconductor company
Staff Digital Design Verification Engineer
福利厚生
•Learning Budget
必須スキル
SystemVerilog
UVM
Digital IC verification
RTL design
Perl
Python
Location: Bristol or Romsey, UK
Our Team:
Semtech Corporation (NASDAQ:SMTC; www.Semtech.com) is a leading supplier of high-quality analogue and mixed-signal semiconductor products. Semtech has a large number of design centres around the world, including three within the UK. The Bristol and Romsey design centres are focused on optoelectronic ICs primarily targeted to datacoms and adjacent markets. Products include TIAs, laser drivers, optical receivers and fully integrated transceiver IC products from below 1Gbps to over 800Gbps. Between our sites, all functions of product development from initial ideas to full productization take place, including, marketing, definition, design, layout, product engineering, validation, test engineering, characterization, qualification, applications, etc. Due to the significant innovation and differentiation in the development of our products, Semtech has continued to be the leader in our target markets.
Job Summary:
As a member of the UK Digital Design team, the Staff level Digital Design Verification Engineer will work on the next generation mixed signal optical devices for Semtech’s Signal Integrity Products (SIP) team, leading complex verification efforts for our advanced digital cores. This role requires technical expertise in verification methodologies, strong leadership capabilities, and the ability to drive verification quality across multiple projects concurrently.
Key Responsibilities:
- Verification Leadership You will lead the development and execution of comprehensive verification strategies for complex digital IP blocks and subsystems. This includes defining verification plans, creating testbench architectures, and establishing coverage goals that ensure first-silicon success. You'll mentor junior engineers, conduct design and code reviews, and establish best practices across the verification team.
- Technical Execution You will develop advanced testbenches using System Verilog and potentially UVM, create constrained-random test sequences, and build functional coverage models. Working closely with design teams, you'll identify and resolve complex bugs, perform protocol compliance verification, and develop reusable verification components. You'll also evaluate and integrate new verification tools and methodologies to improve efficiency and coverage.
- Cross-Functional Collaboration You will work with architecture, design, software, and physical implementation teams to ensure verification requirements are met throughout the development cycle. This includes contributing to architecture reviews, coordinating with emulation and FPGA prototyping efforts, and supporting post-silicon validation activities.
Minimum Qualifications:
- Bachelor's or Master's degree in Electronics Engineering, Computer Engineering, or related field
- 6+ years of experience in digital IC verification
- Expert-level proficiency in System Verilog and UVM methodology
- Strong understanding of digital design concepts, microarchitecture, and RTL design
- Proven track record of successful tape-outs and verification closure
- Proficiency with simulation tools (Xcelium, Questa, VCS) and debug tools (Verdi etc.)
- Experience with coverage analysis and closure methodologies
- Strong scripting skills (Perl, Python, or similar)
Preferred Qualifications
- Experience with assertion-based verification and System Verilog Assertions (SVA)
- Experience with formal verification techniques and tools
- Knowledge of emulation and FPGA prototyping platforms
- Familiarity with low-power verification methodologies (UPF)
- Experience with continuous integration and regression management systems
Key Competencies
- Technical leadership and mentorship abilities
- Excellent problem-solving and debugging skills
- Strong communication skills for cross-functional collaboration
- Ability to manage multiple priorities and drive projects to completion
- Self-motivated with ability to work independently and in team environments
- Commitment to quality and attention to detail
Career Growth Philosophy:
At Semtech, we believe that innovation starts with people. We are committed to empowering professional development through access to mentorship, continuous learning resources, and a collaborative, idea-rich engineering environment.
Our pay-for-performance culture rewards initiative, encourages growth, and recognises meaningful technical and leadership contributions. Engineers in this role are supported to expand their influence, deepen their expertise, and shape both their career progression and the future of Semtech’s digital engineering capabilities.
The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description.
All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.
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Semtechについて

Semtech
PublicSemtech Corp supplies analog, mixed-signal semiconductors, and algorithms for enterprise, communication, and industrial applications.
1,001-5,000
従業員数
Camarillo
本社所在地
$1.2B
企業価値
レビュー
10件のレビュー
3.7
10件のレビュー
ワークライフバランス
3.2
報酬
3.8
企業文化
4.1
キ ャリア
2.5
経営陣
2.3
65%
知人への推奨率
良い点
Supportive and friendly coworkers/team
Good benefits and pay
Flexible work arrangements
改善点
Limited career advancement/upward mobility
Poor management and leadership direction
Heavy/overwhelming workload
給与レンジ
41件のデータ
Mid/L4
Principal/L7
Senior/L5
Mid/L4 · SAP APO Business Analyst
2件のレポート
$92,738
年収総額
基本給
$80,642
ストック
-
ボーナス
-
$90,850
$94,628
面接レビュー
レビュー1件
難易度
2.0
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
HR Screen
3
Hiring Manager Interview
4
Skills Assessment
5
Offer
よくある質問
Past Experience
Technical Knowledge
Attention to Detail
Data Management Skills
Culture Fit
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