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Analog Design Engineer - CMOS Image Sensors

Samsung

Analog Design Engineer - CMOS Image Sensors

Samsung

·

On-site

·

Full-time

·

2mo ago

必备技能

Analog circuit design

ADC design

DAC design

PLL design

LDO design

Leadership

Position Summary

  • Position: Analog Design Engineer
  • CMOS Image Sensors

Team: Sensor

About Samsung Semiconductor India Research (SSIR)

With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile So Cs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.

As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.

Role and Responsibilities:

Roles and Responsibilities

Samsung is a lead provider of CMOS image sensors for mobile and automotive markets. Samsung Semiconductor India R&D (SSIR) is responsible for end-to-end sensor SoC design, firmware and solutions including algorithm optimizations on application processor for mobile products.

Role and Responsibilities:

At least 6 to 11 years circuit design experience on commercialized chips

. Analog circuit design expertise, such as ADC, DAC, PLL, Charge Pump, LDO and BGR

. Solid leadership experience leading circuit designers, demonstrating excellent engineering judgment.

. Solid knowledge of deep submicron process and circuit design issues, design for manufacturability and reliability issues

. Expertise in chip design flows (EMIR/Noise), tools and overall methodologies, IP integration, library cells, lvs, drc.

. Design experience of Full Chip is good to have

. Should be able to work in a dynamic environment with multiple products & product lines.

Experience – 6 to 11 years

Qualifications

  • B.Tech/B.E/M.Tech/M.E

Disclaimer

  • Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India
  • Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

Skills and Qualifications

  • Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.

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关于Samsung

Samsung

Samsung

Public

A technology company that engages in consumer electronics, IT and mobile communications, and device solutions.

10,001+

员工数

Seoul

总部位置

$267B

企业估值

评价

3.7

15条评价

工作生活平衡

2.0

薪酬

2.5

企业文化

1.5

职业发展

2.0

管理层

1.8

15%

推荐给朋友

优点

Hardware/technology leadership

Competitive salary offers for some roles

Sign-on bonuses available

缺点

Toxic culture and politics

Poor work-life balance with strict RTO policies

Micromanagement and employee tracking

薪资范围

46个数据点

Junior/L3

Mid/L4

Senior/L5

Junior/L3 · Designer I, Interaction Design

3份报告

$152,091

年薪总额

基本工资

$117,000

股票

-

奖金

-

$148,249

$154,434

面试经验

6次面试

难度

2.2

/ 5

时长

14-28周

录用率

67%

体验

正面 33%

中性 33%

负面 34%

面试流程

1

Application Review

2

Phone Screen

3

Technical/Video Interview

4

Team Interview

5

Offer

常见问题

Technical Knowledge

Behavioral/STAR

Past Experience

Role-Specific Skills