採用
必須スキル
Analog circuit design
ADC design
DAC design
PLL design
LDO design
Leadership
Position Summary
- Position: Analog Design Engineer
- CMOS Image Sensors
Team: Sensor
About Samsung Semiconductor India Research (SSIR)
With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile So Cs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.
As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.
Role and Responsibilities:
Roles and Responsibilities
Samsung is a lead provider of CMOS image sensors for mobile and automotive markets. Samsung Semiconductor India R&D (SSIR) is responsible for end-to-end sensor SoC design, firmware and solutions including algorithm optimizations on application processor for mobile products.
Role and Responsibilities:
At least 6 to 11 years circuit design experience on commercialized chips
. Analog circuit design expertise, such as ADC, DAC, PLL, Charge Pump, LDO and BGR
. Solid leadership experience leading circuit designers, demonstrating excellent engineering judgment.
. Solid knowledge of deep submicron process and circuit design issues, design for manufacturability and reliability issues
. Expertise in chip design flows (EMIR/Noise), tools and overall methodologies, IP integration, library cells, lvs, drc.
. Design experience of Full Chip is good to have
. Should be able to work in a dynamic environment with multiple products & product lines.
Experience – 6 to 11 years
Qualifications
- B.Tech/B.E/M.Tech/M.E
Disclaimer
- Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India
- Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
Skills and Qualifications
- Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.
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Samsungについて

Samsung
PublicA technology company that engages in consumer electronics, IT and mobile communications, and device solutions.
10,001+
従業員数
Seoul
本社所在地
$267B
企業価値
レビュー
3.7
15件のレビュー
ワークライフバランス
2.0
報酬
2.5
企業文化
1.5
キャリア
2.0
経営陣
1.8
15%
友人に勧める
良い点
Hardware/technology leadership
Competitive salary offers for some roles
Sign-on bonuses available
改善点
Toxic culture and politics
Poor work-life balance with strict RTO policies
Micromanagement and employee tracking
給与レンジ
46件のデータ
Junior/L3
Mid/L4
Senior/L5
Junior/L3 · Designer I, Interaction Design
3件のレポート
$152,091
年収総額
基本給
$117,000
ストック
-
ボーナス
-
$148,249
$154,434
面接体験
6件の面接
難易度
2.2
/ 5
期間
14-28週間
内定率
67%
体験
ポジティブ 33%
普通 33%
ネガティブ 34%
面接プロセス
1
Application Review
2
Phone Screen
3
Technical/Video Interview
4
Team Interview
5
Offer
よくある質問
Technical Knowledge
Behavioral/STAR
Past Experience
Role-Specific Skills
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