トレンド企業

Samsung
Samsung

Samsung Group is a South Korean multinational manufacturing conglomerate headquartered in the Samsung Town office complex in Seoul

NAND BM IP RTL Design Engineer

職種エンジニアリング
経験ミドル級
勤務オンサイト
雇用正社員
掲載2ヶ月前
応募する

必須スキル

Verilog

SystemVerilog

RTL design

State machine design

Debugging

Position Summary

About Samsung Semiconductor India Research (SSIR)
With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile So Cs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.

As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.

Role and Responsibilities:

Samsung Semiconductor India Research (SSIR) is looking for a bright RTL Design Engineer who will be responsible for performing concept and specification study of Samsung Memory (Flash, DRAM).

Providing high quality RTL design in terms of performance, emulation compatibility and area utilization. Writing detailed design specification and micro architecture documents. Memory team, SSIR Bangalore plays a key role in maintaining this leadership by continuous innovation and applying it to a real life products. We provide the opportunities for you to share and build up your knowledge and expertise, and collaborate to drive innovation forward. At Samsung, you will witness your ideas come to life in new products and solutions that shape the future.

Experience: 6+ years

RTL design using Verilog or System Verilog. Strong RTL coding practices.

Design of complex state machines, data paths and arbitration.

Exposure to emulation and emulation compatible RTL design.

Ability to verify functionality with Unit level TB.

Modelling and performance simulation.

Prior experience on memory design is a plus.

Knowledge on area optimization techniques on Emulation platform would be an asset.

Strong Problem solving and RTL debugging skills

Writing detailed design specification and micro architecture documents.

Experience in FPGA based prototypes development

Individual should be self-driven, adaptable, flexible, creative, and capable of working independently.

The candidate needs to be solution-orientated, quality-driven and focused on timely deliverables

Skills and Qualifications Qualifications

  • B.Tech/B.E/M.Tech/M.E

Disclaimer

  • Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India

  • Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

  • Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.

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Samsungについて

Samsung

Samsung

Public

A technology company that engages in consumer electronics, IT and mobile communications, and device solutions.

10,001+

従業員数

Seoul

本社所在地

$267B

企業価値

レビュー

10件のレビュー

4.0

10件のレビュー

ワークライフバランス

3.2

報酬

3.5

企業文化

4.1

キャリア

3.0

経営陣

3.4

72%

知人への推奨率

良い点

Great team culture and collaborative atmosphere

Innovative projects and learning opportunities

Good work-life balance and flexible hours

改善点

Long hours and heavy workload

High stress and tight deadlines

Fast-paced environment can be overwhelming

給与レンジ

22件のデータ

Senior/L5

Senior/L5 · Digital Transformation Manager

1件のレポート

$180,827

年収総額

基本給

$157,414

ストック

-

ボーナス

-

$180,827

$180,827

面接レビュー

レビュー4件

難易度

3.0

/ 5

期間

14-28週間

内定率

25%

面接プロセス

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Team Matching

6

Offer

よくある質問

Coding/Algorithm

Technical Knowledge

Behavioral/STAR

Past Experience

Culture Fit