
Inventing the technologies the world loves.
(PDK) 3D Design Enablement Engineer, up to Staff
Company:
Qualcomm Semiconductor Limited:
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.
Minimum Qualifications:
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
The Qualcomm Memory System/Technology Team in the Process & Package Solutions Group is seeking a highly motivated engineer to focus on PDK development, tape out execution, and EDA user support for advanced semiconductor design flows. This role will involve close collaboration with internal design teams and external foundry partners and tool vendors to ensure robust design enablement and smooth tape out processes for cutting-edge technologies.
Responsibilities
-
Develop, maintain, and validate Process Design Kits (PDKs) for advanced nodes, ensuring accuracy and usability across design environments.
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Drive tapeout readiness and execution, including layout verification, sign-off checks, and coordination with foundries.
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Provide EDA tool support for design teams, focusing on Cadence and other industry-standard platforms for layout, schematic, and verification flows.
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Optimize design methodologies for layout efficiency, DRC/LVS compliance, and manufacturability.
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Collaborate with cross-functional teams including process and packaging engineers, SoC design teams, and foundry partners to resolve design challenges.
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Troubleshoot and resolve issues related to EDA tools, PDK integration, and tapeout flows in a timely manner.
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Contribute to continuous improvement of design enablement infrastructure and automation scripts for enhanced productivity.
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Manage tapeout waiver requests, ensuring proper documentation and approval workflows.
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Create and maintain tapeout checklists and documentation to standardize processes and improve quality.
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Oversee foundry IP management, including tracking, integration, and compliance with licensing agreements.
Preferred Qualifications
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Strong understanding of semiconductor process technology, layout design rules, and tapeout requirements.
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Experience with Design support and new PDK definition, bring up and training
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Hands-on experience with Cadence Virtuoso, layout verification tools, and sign-off methodologies.
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Familiarity with DRC/LVS, parasitic extraction, and physical verification flows.
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Knowledge of scripting languages (e.g., Python, Perl, SKILL) for automation and tool customization.
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Excellent problem-solving skills and ability to work across multiple teams in a fast-paced environment.
Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
If you would like more information about this role, please contact Qualcomm Careers.
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Qualcomm 소개

Qualcomm
PublicInventing the technologies the world loves.
10,001+
직원 수
San Diego
본사 위치
$136B
기업 가치
리뷰
3개 리뷰
3.0
3개 리뷰
워라밸
3.0
보상
2.0
문화
2.5
커리어
3.5
경영진
2.0
45%
지인 추천률
장점
Opportunity to work at reputable company
Interesting work and new skill development
Strong brand name recognition
단점
Low compensation compared to market rates
Poor communication from employees
No benefits provided
연봉 정보
21개 데이터
Mid/L4
Mid/L4 · Analog Mixed Signal Design Engineer
4개 리포트
$155,284
총 연봉
기본급
$119,434
주식
-
보너스
-
$155,284
$155,284
면접 후기
후기 8개
난이도
2.8
/ 5
소요 기간
14-28주
면접 과정
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
자주 나오는 질문
Coding/Algorithm
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
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