Company:

Qualcomm Canada ULC:

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

We are seeking a highly motivated DSP/NPU ML Modeling Engineer to join our team in developing and optimizing DSP algorithms for cutting-edge ML applications.New Headcount

This role is deeply into modeling architecture/micro-architecture of the Qualcomm DSP ML coprocessor and analyzing performance of the target applications on the processors, which include developing performance simulator model, correlating the performance model to RTL model, analyzing workload, defining ISA and features, and so on.

The responsibility requires very good understanding to computer architecture/micro-architecture, system architecture, and memory architecture along with proficient software development skills.

Key Responsibilities

• Develop and maintain DSP/NSP models for simulation and performance analysis.
• Collaborate with architecture and design teams to evaluate processor features and trade-offs.
• Implement and optimize DSP ML algorithms in C/C++ and assembly language.
• Analyze floating-point and fixed-point performance and accuracy.
• Support verification and validation of DSP implementations.
• Evaluates all aspects of the design process from instruction set architecture to implementation.
• Identifies and models new custom instructions set which is needed to achieve top-notch results in machine learning applications.
• Applies high-performance microprocessor design concepts including multi-core, multi-threaded, out-of-order, cache memory, high-speed ALU, and advanced low power design.

Preferred Qualifications

• Master's or PhD degree in Electrical Engineering, Computer Science, Computer Engineering, or related field.
• Strong proficiency in **C/C++**and assembly language.
• Solid understanding of processor architecture, including pipelines, caches, and instruction sets.
• Experience with floating-point arithmetic and numerical analysis.
• Excellent problem-solving and communication skills.
• Exposure to compiler optimization techniques.
• Prior experience in embedded systems or hardware/software co-design.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR
  Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
  OR
  PhD in Science, Engineering, or related field.

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Pay range and Other Compensation & Benefits:

$104,900.00 - $154,900.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.

If you would like more information about this role, please contact Qualcomm Careers.