
Inventing the technologies the world loves.
GPU Physical Design Engineer (Lead/Staff/Sr Staff)
Company:
Qualcomm India Private Limited:
Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
Minimum Qualifications:
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
Role Overview
As a Lead / Staff / Senior Staff Physical Design Engineer in the GPU team, you will be responsible for the end‑to‑end physical implementation of high‑performance, low‑power GPU cores used across mobile, compute, and automotive platforms. You will work closely with RTL, micro‑architecture, DFT, STA, and signoff teams to deliver best‑in‑class PPA (Performance, Power, Area) on advanced technology nodes.
Staff and Senior Staff engineers are expected to drive block‑level ownership, make critical PPA trade‑offs, mentor junior engineers, and influence physical design methodology, while Lead engineers focus on strong technical execution and convergence.
Key Responsibilities
- Own complete Physical Design / Physical Implementation flow for complex GPU cores, including:
Floorplanning
-
Place and Route
-
Clock Tree Synthesis (CTS)
-
Static Timing Analysis (STA)
-
Physical Verification (DRC/LVS)
-
Formal verification
-
Power Delivery Network (PDN) design
-
Drive timing closure for high‑frequency, data‑path‑intensive GPU blocks across multi‑mode, multi‑corner scenarios
-
Optimize PPA trade‑offs and push designs to aggressive performance and power targets on advanced technology nodes
-
Perform timing ECOs, functional ECO roll‑ins, and debug critical timing, power, and physical violations
-
Collaborate closely with RTL, micro‑architecture, DFT, and signoff teams to resolve constraints, clocking, and implementation issues
-
Develop and apply low‑power implementation techniques and customized P&R strategies for GPU cores
-
Contribute to PD flow automation, methodology improvements, and efficiency enhancements using scripting
-
Mentor junior engineers and provide technical leadership (Staff / Senior Staff levels)
Required Technical Skills
-
6 to 15 years of experience in Physical Design / Physical Implementation for complex So Cs or high‑performance cores (GPU or CPU preferred)
-
Strong hands‑on experience with industry‑standard P&R tools such as Synopsys ICC2 and/or Cadence Innovus
-
Strong expertise in Static Timing Analysis using Prime Time and/or Tempus
-
Deep understanding of advanced STA concepts and clocking architecture
-
Experience with multi‑corner timing closure and high‑frequency designs
-
Solid understanding of PDN design, power optimization, and leakage control
-
Proficiency in Tcl and/or Perl scripting for flow automation
-
Experience working on advanced deep sub‑micron technology nodes
Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
If you would like more information about this role, please contact Qualcomm Careers.
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Qualcommについて

Qualcomm
PublicInventing the technologies the world loves.
10,001+
従業員数
San Diego
本社所在地
$136B
企業価値
レビュー
3件のレビュー
3.0
3件のレビュー
ワークライフバランス
3.0
報酬
2.0
企業文化
2.5
キャリア
3.5
経営陣
2.0
45%
知人への推奨率
良い点
Opportunity to work at reputable company
Interesting work and new skill development
Strong brand name recognition
改善点
Low compensation compared to market rates
Poor communication from employees
No benefits provided
給与レンジ
21件のデータ
Mid/L4
Mid/L4 · Analog Mixed Signal Design Engineer
4件のレポート
$155,284
年収総額
基本給
$119,434
ストック
-
ボーナス
-
$155,284
$155,284
面接レビュー
レビュー8件
難易度
2.8
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
よくある質問
Coding/Algorithm
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
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