채용
Required Skills
Python
Linux
Company:
Qualcomm Canada ULC:
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
About the Role
QCT’s DSP Team is actively seeking talented Physical Design Engineers to join our DSP PD team. As a Physical Design Engineer, you will innovate, develop, and implement DSP cores using state-of-the-art tools and technologies. This role requires strong expertise in physical design flow, tapeout readiness, and Power, Performance, and Area (PPA) optimization for advanced technology nodes. Backfill.
Key Responsibilities
- Own and execute complete Physical Design flow from netlist to GDSII, including:
- Floorplanning, power planning, IR-drop analysis
- Placement, MMMC clock tree synthesis, routing
- Timing optimization and closure across multiple modes and corners
- Perform PPA analysis and optimization to meet aggressive power, performance, and area targets.
- Develop and enable low-power implementation methods and customized P&R strategies for area reduction and performance improvement.
- Debug timing violations, implement timing fixes, and roll in functional ECOs.
- Conduct RC extraction, signal integrity, crosstalk noise/delay analysis, and formal verification.
- Manage tapeout activities, ensuring sign-off for DRC, LVS, timing, power integrity, and reliability.
- Collaborate with RTL, architecture, and verification teams to influence design decisions for optimal PPA.
- Contribute to flow enhancements and automation using scripting (Perl/TCL, Python, Linux shell).
Required Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering or related field.
- 7+ years of industry experience in Physical Design for ASIC/SoC.
- Proven tapeout experience with successful delivery of complex cores.
- Hands-on expertise with:Place & Route tools: Cadence Innovus and/or Synopsys ICC2/Fusion Compiler
- Timing closure: Synopsys Prime Time
- Physical verification: DRC/LVS sign-off flows
- Strong understanding of DFT, multi-mode/multi-corner designs, and ECO flows.
- Proficiency in scripting languages (Perl, TCL, Python) and Linux/Unix environments.
Preferred Skills
- Experience with latest advanced technology nodes.
- Knowledge of power integrity analysis (IR-drop, EM) and low-power design techniques.
- Familiarity with formal verification , understanding of DFM and post-silicon validation .
- Ability to work in a fast-paced environment and communicate effectively with cross-functional teams.
Why Join Us?
- Work on cutting-edge DSP cores for next-generation products.
- Opportunity to lead tapeout and PPA optimization for high-performance, low-power designs.
- Collaborative team environment with strong focus on innovation and technical excellence.
Minimum Qualifications:
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
Pay range and Other Compensation & Benefits:
$124,200.00 - $174,200.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.
If you would like more information about this role, please contact Qualcomm Careers.
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About Qualcomm

Qualcomm
PublicInventing the technologies the world loves.
10,001+
Employees
San Diego
Headquarters
Reviews
3.6
5 reviews
Work Life Balance
4.0
Compensation
4.0
Culture
2.5
Career
3.0
Management
2.5
Pros
Good work-life balance
Real engineering work with technical challenges
Good compensation
Cons
Slow processes and bureaucracy
Poor management and planning
Cross-team dependencies and alignment issues
Salary Ranges
1 data points
Junior/L3
Junior/L3 · Data Scientist
0 reports
$215,000
total / year
Base
$170,000
Stock
$30,000
Bonus
$15,000
$182,750
$247,250
Interview Experience
8 interviews
Difficulty
3.4
/ 5
Duration
14-28 weeks
Experience
Positive 0%
Neutral 50%
Negative 50%
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Technical Interview/Onsite
5
Team Matching
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
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