Company:

Qualcomm India Private Limited:

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

General Summary:

• Bachelors /Masters degree in Engineering
• Relevant experience of 2-12 yrs in any of the mentioned domain
• Design/Verification/ Implementation
• Will be working on cutting-edge Wireless Technology (IEEE 802.11) team.
• Strong fundamentals in core areas: Microarchitecture, Computer Arithmetic, Circuit Design, Process Technology

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR
  Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
  OR
  PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

• Design- You will be responsible for developing HW blocks (IP design), conduct High/Mid/Low level Design review and delivery IP to Subsystem team for making complex So Cs.

• You will be a critical part of the WLAN subsystem, contribute to IP design, sign-off the core to the SOC design team.

• Strong communication skills to work with design teams worldwide
  Verification- Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C

• As a design verification engineer you will work on developing IPs catering to upcoming Wifi standards like 802.11bn and beyond.

• You will have opportunity to contribute to the life cycle of the technology right from IP specification, till productization/customer deployments, leveraging your verification, pre and post silicon debug expertise.
  Implementation- Candidate will be responsible for next generation WLAN hardmacro implementation

• Extensive experience in Synthesis (DC or Genus), Formal Verification (LEC / Formality), Conformal Low Power, PTPX, Primetime, Conformal ECO

• Extensive experience in UPF based power intent and synthesis

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