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Signal Integrity Architect
Santa Clara, California, United States of America; Austin, Texas, United States of America
·
On-site
·
Full-time
·
3mo ago
Company:
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > Systems Engineering
General Summary:
Qualcomm Data Center team is developing High performance, Energy efficient server solution for data center applications. We are looking for highly talented, innovative, teamwork-oriented individuals for our cutting-edge technology work!
Our Mission
We are dedicated to transforming the industry by reimagining silicon and developing next-generation computing platforms. By joining our team, you’ll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. Our focus is on developing reference platforms based on Qualcomm's Snapdragon SoC, delivering a comprehensive solution that includes hardware, software, reference designs, user guides, SDKs, and more.
Position: Signal Integrity Architect
We are seeking an experienced Signal Integrity Architect (individual contributor) to develop high-performance signal integrity (SI) solutions tailored for advanced server applications. In this role, you will work closely with the platform team and collaborate with cross-functional teams, including software, firmware, packaging, product management, and component suppliers. You will lead the definition, analysis, and verification of SI for high-speed interconnects across die, interposer, package, PCB, and system levels for data center servers.
Key Responsibilities
- Collaborate with SoC, applications engineering, packaging, and system design teams to define and implement system interconnects that meet the unique demands of high-end server environments.
- Provide guidelines and feedback on silicon timing, bump/RDL, package pinout and PCB specifications.
- Develop customer guidelines and define module interfaces/formats for simulation.
- Lead the creation of server-grade SI models, simulations, and final designs.
- Perform early SI analysis on 2.5D/3D structures and establish design guidelines.
- Update and automate design and analysis flows.
- Prepare and present technical documentation and reports to stakeholders, including engineering teams, senior management, customers, and suppliers.
Minimum Qualifications
- Master’s degree in Electrical or Computer Engineering, with a specialization in Signal Integrity (SI).
- 6+ years of experience in SI analysis, simulation, and measurement of high-speed digital systems.
- Strong knowledge of SI fundamentals, including power distribution networks (PDN), EMIR, transmission line theory, crosstalk, S-parameters, and channel simulations.
- Expertise in DDR5/LPDDR5X JEDEC specifications and/or Ser Des standards (PCIe, CXL, USB, Ethernet, etc.).
- Experience in developing SI methodologies from die to system, with lab correlation and validation.
- Proficiency with 2D/2.5D/3D EM simulation tools such as ANSYS HFSS Cadence Sigrity, Dassault Systèmes CST, Keysight ADS, and Synopsys' HSPICE.
- Hands-on experience creating complex SI models and performing both frequency and time-domain simulations.
- Proficiency in Unix/Linux environments and experience with EDA tools through scripting.
- Strong knowledge of packaging and PCB technologies, design, and manufacturing processes.
- Familiarity with 2.5D/3D packaging technologies, such as Co WoS, In Fo, EMIB, and RDL.
- Hands-on experience with electrical validation and compliance testing using tools like VNAs, oscilloscopes, spectrum analyzers, PCIe/I2C analyzers, traffic generators, TDR, and differential probes.
- Proven ability to work independently and collaboratively within a cross-functional team environment.
- Strong technical documentation skills and excellent written and verbal communication.
Preferred Qualifications
- Ph.D. in Electrical or Computer Engineering, specializing in SI.
- 10+ years of experience in SI analysis, simulation, and measurement of high-speed digital systems.
- In-depth understanding of computational electromagnetics and transmission line theory.
- Proficiency in DDR5 and LPDDR5X timing budgets, jitter analysis, and PHY design/link analysis.
- Experience with SI simulation for PCIe Gen6+, multi-gigabit serial buses (112Gbps+), UCIE, etc.
- Experience with package and PCB design tools such as Cadence Allegro.
- Proficiency in scripting with MATLAB, Perl, and Python
Minimum Qualifications:
- Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR
Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience.
OR
PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range and Other Compensation & Benefits:
$220,200.00 - $330,400.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
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Qualcommについて

Qualcomm
PublicInventing the technologies the world loves.
10,001+
従業員数
San Diego
本社所在地
$136B
企業価値
レビュー
3.7
10件のレビュー
ワークライフバランス
2.8
報酬
3.5
企業文化
3.2
キャリア
4.0
経営陣
2.5
65%
友人に勧める
良い点
Good benefits and compensation
Great working atmosphere and colleagues
Challenging and interesting projects
改善点
Poor work-life balance
Toxic culture and leadership issues
Increasing pressure and micromanagement
給与レンジ
21件のデータ
Junior/L3
Junior/L3 · Data Scientist
0件のレポート
$196,000
年収総額
基本給
$150,000
ストック
$33,000
ボーナス
$13,000
$166,600
$225,400
面接体験
9件の面接
難易度
2.6
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
よくある質問
Coding/Algorithm
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
ニュース&話題
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