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职位NXP Semiconductors

Senior ASIC Design Engineer

NXP Semiconductors

Senior ASIC Design Engineer

NXP Semiconductors

Pune

·

On-site

·

Full-time

·

2mo ago

必备技能

ASIC Design

Verilog

RTL

C/C++

System Verilog

UVM

Bluetooth

IEEE 802.15.4

Wireless design

Python

Perl

Tcl

We are part of a great team within NXP that delivers the industry’s first tri-radio chip. Please visit our recent announcement: NXP Advances IoT Connectivity with Industry’s First Secure Tri-Radio Device | NXP Semiconductors

We have a senior level ASIC design engineer opening. Will you be interested in working on cutting-edge wireless technology that will be the backbone of future connected lifestyle? Do you like to work with a group of passionate and talented engineers to tackle the most crucial tasks leading to the next-generation of innovations? Are you ready for a career move that could make a bigger impact to the team’s success?

Our team focuses on wireless MAC controllers and system level development for wireless products, with a heavy focus on design and verification to accommodate new customer requested features and new standard specification feature developments. This is a great opportunity to work on wireless related product development with the best-in-class performance, area and lower power.

Your Responsibilities:

  • Working in full ASIC design cycle ranging from micro architecture design, RTL coding, verification, synthesis, FPGA prototyping, and silicon bring-up.
  • IP/SoC verification in C/C, System Verilog, and UVM environment.
  • Support of IP delivery, FPGA prototyping and silicon validation.
  • Solving complex design and verification problems with your innovative ideas.

Your Profile Preferred:

  • MSEE with 3 years of experience with working knowledge in Bluetooth, IEEE 802.15.4, wireless or other networking controller design and implementation.
  • Micro-architecture, Verilog RTL coding, and IP/SoC verification.
  • Familiar with ASIC design concept and design flow: HW/SW co-simulation, synthesis, Lint/CDC, and formal verification.
  • Fluent in C/C, System Verilog, and UVM.
  • Familiar with SVA assertion and coverage driven verification.
  • Familiar with Perl, Python, shell script, and Tcl.
  • Small area and low power design experience.
  • SOC integration experience.
  • Complete product cycle experience from specification to production.
  • Hands-on lab experience on FPGA validation and post-silicon bring-up.
  • Excellent communication and report documentation skills.

NXP’s Wireless Connectivity team has an open and inclusive work environment that promotes excellence, innovation, collaboration, and integrity. An expanding business comes with tremendous career opportunities which will challenge and grow your talents. If you are ready to start the next chapter of your career in the wireless area, you don’t want to miss this opportunity to join a world leader in this technology.

More information about NXP in India...

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关于NXP Semiconductors

NXP Semiconductors

NXP Semiconductors produces secure connectivity solutions for embedded applications.

10,001+

员工数

Eindhoven

总部位置

$45B

企业估值

评价

3.7

10条评价

工作生活平衡

3.8

薪酬

4.0

企业文化

4.2

职业发展

3.2

管理层

3.0

72%

推荐给朋友

优点

Supportive management and colleagues

Good work-life balance and flexible hours

Innovation and interesting technology projects

缺点

Limited career advancement and training opportunities

Management communication and organization issues

Heavy workload and long hours during deadlines

薪资范围

227个数据点

Junior/L3

L3

Intern

Junior/L3 · Data Scientist

0份报告

$114,000

年薪总额

基本工资

$99,000

股票

-

奖金

$15,000

$96,900

$131,100

面试经验

42次面试

难度

3.1

/ 5

时长

14-28周

录用率

33%

体验

正面 69%

中性 13%

负面 18%

面试流程

1

Phone Screen

2

Technical Interview

3

Hiring Manager

4

Team Fit

常见问题

Technical skills

Past experience

Team collaboration

Problem solving