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求人NXP Semiconductors

Senior Analog Layout Engineer

NXP Semiconductors

Senior Analog Layout Engineer

NXP Semiconductors

Penang; Kuala Lumpur

·

On-site

·

Full-time

·

4w ago

Key Responsibilities

Custom Analog Layout Execution

  • Perform full‑custom analog layout for critical circuit blocks, including:** Analog Front Ends (AFEs)**
  • ADCs and DACs
  • PLLs and clocking circuits
  • Voltage regulators and references
  • Analog filters and bias circuits
  • Translate schematics into high‑quality, silicon‑proven layouts in advanced nodes.
  • Apply best‑in‑class techniques for:Matching and symmetry
  • Parasitic control
  • Noise isolation and substrate coupling mitigation
  • EM/IR and reliability robustness

Verification & Sign‑off

  • Run and debug DRC, LVS, ERC, and reliability checks.
  • Work with designers to close LVS and performance issues.
  • Support PEX extraction and simulation correlation.
  • Ensure layouts meet foundry design rules and sign‑off requirements.

Collaboration & Production Support

  • Partner closely with analog circuit designers, CAD, and methodology teams.
  • Participate in layout and design reviews.
  • Support silicon bring‑up, debug, and yield improvement as needed.
  • Contribute to layout guidelines, documentation, and best practices.

Required Qualifications

Education

  • BSEE or equivalent in Electrical / Electronics Engineering (preferred).

Experience

  • 6–10 years of hands‑on experience in custom analog / mixed‑signal layout.
  • Proven experience working in 28nm, 22nm, and/or 16nm CMOS process technologies.
  • Demonstrated experience laying out complex analog IP blocks (AFE, ADC, DAC, PLL, regulators).

Tools & Methodologies

  • Strong proficiency with:** Cadence Virtuoso Layout Suite**
  • Calibre (DRC, LVS, PEX)
  • Solid understanding of:Foundry design rules
  • Device matching and layout‑dependent effects
  • Parasitics, coupling, and noise mitigation
  • Reliability (EM, IR, ESD awareness)
  • Familiarity with advanced-node layout challenges is required.

Preferred Qualifications

  • Experience in automotive or high‑reliability semiconductor products.
  • Familiarity with low‑noise, high‑speed analog layouts.
  • Ability to mentor junior layout engineers.
  • Exposure to ISO / automotive quality flows is a plus.

More information about NXP in Malaysia...

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NXP Semiconductorsについて

NXP Semiconductors

NXP Semiconductors produces secure connectivity solutions for embedded applications.

10,001+

従業員数

Eindhoven

本社所在地

$45B

企業価値

レビュー

3.7

10件のレビュー

ワークライフバランス

3.8

報酬

4.0

企業文化

4.2

キャリア

3.2

経営陣

3.0

72%

友人に勧める

良い点

Supportive management and colleagues

Good work-life balance and flexible hours

Innovation and interesting technology projects

改善点

Limited career advancement and training opportunities

Management communication and organization issues

Heavy workload and long hours during deadlines

給与レンジ

227件のデータ

Junior/L3

L3

Intern

Junior/L3 · Data Scientist

0件のレポート

$114,000

年収総額

基本給

$99,000

ストック

-

ボーナス

$15,000

$96,900

$131,100

面接体験

42件の面接

難易度

3.1

/ 5

期間

14-28週間

内定率

33%

体験

ポジティブ 69%

普通 13%

ネガティブ 18%

面接プロセス

1

Phone Screen

2

Technical Interview

3

Hiring Manager

4

Team Fit

よくある質問

Technical skills

Past experience

Team collaboration

Problem solving