Leading company in the semiconductor industry
Senior RFIC Design Engineer at NXP Semiconductors
About the role
NXP is seeking a highly motivated and experienced Senior RFIC Design Engineer to contribute to the development of cutting-edge RF integrated circuits for wireless communication systems. This role involves the design, simulation, and verification of complex RF blocks, ensuring high performance and efficiency.
Job Responsibilities
- Design, simulate, and verify RFIC blocks such as LNAs, PAs, Mixers, VCOs, PLLs, and frequency synthesizers for various wireless standards (e.g., Wi-Fi, Bluetooth, 5G).
- Perform detailed transistor-level circuit design and optimization for performance, power, and area.
- Conduct extensive pre-layout and post-layout simulations using industry-standard tools (e.g., Cadence Virtuoso, SpectreRF, HFSS).
- Collaborate with system architects, digital design engineers, and test engineers to define specifications and ensure seamless integration.
- Develop and implement innovative circuit architectures and design techniques to meet challenging performance requirements.
- Participate in layout supervision and review, ensuring adherence to design intent and manufacturing process rules.
- Debug and characterize RFIC prototypes in the lab, identifying and resolving performance issues.
- Generate comprehensive design documentation, including design specifications, simulation reports, and test plans.
- Stay abreast of the latest advancements in RFIC design methodologies and technologies.
Job Qualifications
- Master's degree or Ph.D. in Electrical Engineering with a specialization in RF/Microwave circuits.
- 5+ years of industry experience in RFIC design in CMOS processes.
- Strong theoretical understanding of RF/microwave fundamentals and analog circuit design.
- Proficiency with RFIC design tools such as Cadence Virtuoso, SpectreRF, EM simulators (e.g., HFSS, Momentum), and MATLAB.
- Hands-on experience with RF lab equipment (spectrum analyzers, network analyzers, signal generators, oscilloscopes).
- Demonstrated ability to successfully tape-out and characterize complex RFICs.
- Experience with various analog and RF block designs including LNAs, PAs, Mixers, VCOs, PLLs, and frequency synthesizers.
- Familiarity with various wireless communication standards (e.g., Wi-Fi, Bluetooth, 5G, UWB).
- Excellent problem-solving skills and attention to detail.
- Strong communication and interpersonal skills, with the ability to work effectively in a team environment.
The base salary range for this position is as mentioned below per year. We also provide competitive benefits, incentive compensation, and/or equity for certain roles.
Company benefits include health. dental, and vision insurance. 401(k), and paid leave. Please note that the base salary range (OR hourly rate) is a guideline, and individual total compensation may vary based on a number of factors such as qualifications, skill level, work location, and other business and organizational needs. This base pay range is specific to California and is not applicable to other locations. A reasonable estimate of the base salary range as of the date of this posting is:
$166,200 to $228,500 annually
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
Required skills
RFIC design
Circuit simulation
Layout review
Lab characterization
Analog/RF design
Performance optimization
Documentation
Cross-functional collaboration
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About NXP Semiconductors
NXP Semiconductors
PublicNXP Semiconductors produces secure connectivity solutions for embedded applications.
10,001+
Employees
Eindhoven
Headquarters
$45B
Valuation
Reviews
10 reviews
3.7
10 reviews
Work-life balance
3.5
Compensation
4.0
Culture
3.8
Career
3.2
Management
3.0
72%
Recommend to a friend
Pros
Supportive management and colleagues
Innovation and interesting technology
Good work-life balance and flexible hours
Cons
Management issues and poor communication
Limited career advancement and training
Heavy workload and long hours
Salary Ranges
227 data points
Junior/L3
Intern
L3
Junior/L3 · Data Scientist
0 reports
$114,000
total per year
Base
$99,000
Stock
-
Bonus
$15,000
$96,900
$131,100
Interview experience
42 interviews
Difficulty
3.1
/ 5
Duration
14-28 weeks
Offer rate
33%
Experience
Positive 69%
Neutral 13%
Negative 18%
Interview process
1
Phone Screen
2
Technical Interview
3
Hiring Manager
4
Team Fit
Common questions
Technical skills
Past experience
Team collaboration
Problem solving
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