Generic Job Description (not Job Level specific): The Digital Design Engineer / Architect is responsible for defining and realizing Digital functions on IPs, Subsystem or IC level based on required specifications. The individual is responsible for design, verification and evaluation of those. The individual is accountable for designing according to specifications, quality and reliability needs. Participation in problem solving for Digital and system domain of the device. Author of the design-specific documentation for internal and external use.

A good command of digital design languages (system Verilog), including verification (simulation) and use of formal tools (Spyglass, Questa) is required.

In details:

• Mastery of a Unix working environment
• Proficiency with database management and configuration tools
• Design of digital modules: VHDL, Verilog, System Verilog
• RTL synthesis into logic gates
• Code optimization: pipelining, re-timing
• Code quality verification
• Re-synchronization and MTBF calculation for metastability
• Simulation at different description levels of the function: RTL, netlist
• Use of code coverage tools
• Power consumption estimation at various design stages (RTL, netlist)
• Documentation writing: for designers and for user manuals
• Low-level software development for embedded RISC processors (C language)
• Co-simulation of the complete solution: RTL and low-level software
• Mastery of scripting for data processing: Perl, Python

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