Principal Hardware ASIC Architect engineer
About the role
Architecture & Micro-Architecture
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Define product feature and capabilities and own the architecture for compute, memory, interconnect & high-speed interface subsystems in the AI inference chip.
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Collaborate with software to co-optimize hardware features for AI workloads.
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Collaborate with RTL designers to identify and complex technical issues/risks. Review and guide RTL implementation, ensuring consistency with architectural intent and timing/power goals
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Collaborate with Physical-design teams for Area/Floorplan refinment, Timing targets etc.
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Define and document interface specifications, control/status logic, and pipeline structures.
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Lead PPA analysis and trade-off discussions across RTL and architecture.
Modelling & Analysis -
Develop and maintain high-level architecture and performance models.
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Use simulation and architectural models to guide RTL-level improvements.
Benefits and perks
•Learning Budget
•Flexible Hours
•401(k)
•Paid Time Off
•Vision Insurance
Required skills
Semiconductor design
Validation
Technical documentation
About NXP Semiconductors
Hyderabad
Headquarters