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Senior Analog Validation/Characterization Engineer

NXP Semiconductors

Senior Analog Validation/Characterization Engineer

NXP Semiconductors

San Jose (Holger Way)

·

On-site

·

Full-time

·

4d ago

Required Skills

Python

We are looking for a mid-level Mixed-Signal Engineer to join our Automotive Semiconductor division. This role bridges the gap between pre-silicon design and post-silicon reality. You will spend roughly 50% of your time developing behavioral models to speed up chip simulation and 50% of your time in the lab performing hands-on validation of high-speed transceiver silicon.

Key Responsibilities

  • AMS Modeling: Create and maintain behavioral models (System Verilog/RNM, Verilog-A) for mixed-signal blocks to support full-chip functional verification.

  • Hardware Validation: Perform bench-top characterization of high-speed transceivers (10G+) using standard lab equipment (Oscilloscopes, VNAs, BERTs).

  • Python Scripting: Develop and optimize Python scripts to automate lab measurements, parse large datasets, and generate validation reports.

  • Simulation: Run mixed-signal co-simulations (Cadence Virtuoso/Spectre) to verify connectivity and basic functionality of analog-digital interfaces.

  • Cross-Functional Support: Collaborate with Design and Verification teams to debug silicon issues and correlate lab results with simulation data.

Skills & Qualifications

  • Education: BSEE or MSEE with 3+ years of experience in IC modeling, design, or validation.

  • Simulation Tools: Experience with Cadence Virtuoso, Spectre, or similar mixed-signal simulation environments.

  • Modeling Languages: Proficiency in System Verilog(Real Number Modeling preferred) or Verilog-A.

  • Test & Measurement: Hands-on experience with high-speed lab equipment for signal integrity and performance testing.

  • Software/Scripting: Strong Python skills for automation (knowledge of libraries like Num Py, Matplotlib, or PyVISA is a plus).

Preferred Qualifications

  • Familiarity with high-speed serial standards (e.g., Ser Des, Ethernet, or PCIe).

  • Experience working within a structured Product Development Process (PDP) in a large-scale semiconductor environment.

  • Understanding of basic signal integrity concepts (jitter, eye diagrams, insertion loss).

The base salary range for this position is as mentioned below per year. We also provide competitive benefits, incentive compensation, and/or equity for certain roles.
Company benefits include health. dental, and vision insurance. 401(k), and paid leave. Please note that the base salary range (OR hourly rate) is a guideline, and individual total compensation may vary based on a number of factors such as qualifications, skill level, work location, and other business and organizational needs. This base pay range is specific to California and is not applicable to other locations. A reasonable estimate of the base salary range as of the date of this posting is:

$166,200 to $228,500 annually

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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About NXP Semiconductors

NXP Semiconductors

NXP Semiconductors produces secure connectivity solutions for embedded applications.

10,001+

Employees

Eindhoven

Headquarters

Reviews

3.9

44 reviews

Work Life Balance

3.8

Compensation

3.9

Culture

4.1

Career

3.6

Management

3.8

73%

Recommend to a Friend

Pros

Competitive compensation and benefits

Good work-life balance and flexible environment

Interesting projects and challenges

Cons

Room for improvement in processes

Work-life balance varies by team

Internal communication could improve

Salary Ranges

267 data points

Junior/L3

L3

Junior/L3 · Data Scientist

0 reports

$114,000

total / year

Base

$99,000

Stock

-

Bonus

$15,000

$96,900

$131,100

Interview Experience

42 interviews

Difficulty

3.1

/ 5

Duration

14-28 weeks

Offer Rate

33%

Experience

Positive 69%

Neutral 13%

Negative 18%

Interview Process

1

Phone Screen

2

Technical Interview

3

Hiring Manager

4

Team Fit

Common Questions

Technical skills

Past experience

Team collaboration

Problem solving