2026 Campus - SoC DFT Engineer
About the role
NXP team members create breakthrough technologies that make the connected world better, safer and more secure. We're looking for innovative, passionate, and talented people like you to join our team.
Responsibility:
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Proficiency in whole DFT architecture definition.
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Setup and maintain DFT flow, familiar with script language.
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Be responsible for definition and implementation different schemes of DFT aspects: including scan/MBIST/JTAG insertion, ATPG generation, test patterns generation.
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Experience RTL/netlist simulation, good debug capability, familiar with Verilog.
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Experience with ATE on-line debugging and DFT diagnosis. Experience with Post-silicon DPPM improvement, coverage hole analysis.
Requirement:
- Bachelor or master’s degree in Microelectronics, Electronics, Electrical Engineering, Computer Science or relevant disciplines.
- Good knowledge and experience in DFT implementation methodology, flow optimization and DFT coverage improvement. Mentor tool is a plus.
- Strong skills of solving problem, self-motivated and good team player.
Benefits and perks
•Comprehensive Health Dental And Vision Insurance
•Competitive Salary And Equity Package
•Flexible Hours
•401k Matching
•Team Events And Activities
Required skills
TypeScript
React
Node.js
About NXP Semiconductors
Tianjin (Teda)
Headquarters