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NVIDIA
NVIDIA

Pioneering accelerated computing and AI

ASIC Design and STA Engineer at NVIDIA

RoleEmbedded
LevelMid Level
LocationIndia
WorkOn-site
TypeFull-time
Posted1 day ago
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About the role

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel.

NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world!

NVIDIA is looking for a best-in-class ASIC STA Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency for today's AI platforms! Come and take a part in designing our groundbreaking large scale and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you will be doing:

  • Be in charge of full chip and/or chiplet level STA convergence from early stages to signoff.

  • Take part in top level floor plan and clock planning.

  • Optimize, together with CAD signoff flows and methodologies.

  • Digital Partitions' and analog IPs' timing integration, giving feedback to PD/RTL and driving convergence.

  • Work closely with logic design and DFT engineers to define and implement constraints for the various work modes, including their optimization for runtime and efficiency.

What we need to see:

  • B.SC./ M.SC. in Electrical Engineering/Computer Engineering.

  • 3+ years of experience in physical design and STA

  • Proven experience in RTL2GDS and STA design and convergence

  • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.)

  • Hands on STA experience from early stages to signoff using Synopsis Primetime. Deep knowledge in timing concepts required.

  • Great teammate.

NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

Required skills

STA

Timing closure

Clock planning

ASIC design

Signoff flows

Timing integration

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About NVIDIA

NVIDIA

NVIDIA

Public

A computing platform company operating at the intersection of graphics, HPC, and AI.

10,001+

Employees

Santa Clara

Headquarters

$4.57T

Valuation

Reviews

10 reviews

4.4

10 reviews

Work-life balance

2.8

Compensation

4.5

Culture

4.2

Career

4.3

Management

3.8

78%

Recommend to a friend

Pros

Cutting-edge technology and innovation

Excellent compensation and benefits

Great team culture and collaboration

Cons

High pressure and expectations

Poor work-life balance and long hours

Fast-paced environment leading to burnout

Salary Ranges

79 data points

Junior/L3

Mid/L4

Senior/L5

Junior/L3 · Analyst

7 reports

$170,275

total per year

Base

$130,981

Stock

-

Bonus

-

$155,480

$234,166

Interview experience

5 interviews

Difficulty

3.0

/ 5

Interview process

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Team Matching

6

Offer

Common questions

Coding/Algorithm

System Design

Behavioral/STAR

Technical Knowledge

Past Experience