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求人NVIDIA

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA

US, CA, Santa Clara

·

On-site

·

Full-time

·

2mo ago

報酬

$116,000 - $218,500

福利厚生

Equity

必須スキル

SystemVerilog

UVM

Design Verification

Logic Design

Logic Synthesis

Python

Perl

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today.

The GPU clocks group is looking for an exceptional ASIC Clocks Verification Engineer. The team is responsible for crafting all aspects of GPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts with the floor-planning and back-end team to help craft the physical floorplan of the chip. The team explains the programming model to the SW team to come up with an efficient clock programming sequence. The team works with the silicon solution team to triage silicon or programming bugs in the lab.

What you'll be doing:

  • As a Clocks team member, you will be collaborating with other architects, ASIC designers and verification engineers to verify high frequency clock structures.

  • Be able to engage with multiple teams and design the GPU clock structure to satisfy all the architectural constraints.

  • Your understanding of general verification principles will be valuable to verify the clocks design.

  • Together with other team members, we deliver clock information to SOC verification team, timing and DFT teams. You will use Perl to improve the productivity of the above teams.

  • Collaborate with Software and product group to debug GPU clock silicon bugs in our new products.

  • Understand and design clocking structures to overcome sub-micron design challenges.

  • You will also identify improvements in the current design and propose and implement new ways to improve the efficiency in the GPU clocking design.

What we need to see:

  • A Master’s degree in Electrical Engineering (or equivalent experience).

  • Practical experience with System Verilog and Universal Verification Method (UVM).

  • Experience with Design Verification, Logic Design, and Logic Synthesis.

  • Strong coding skills in Python, Perl, or other industry-standard scripting languages.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? If so, we want to hear from you.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until February 16, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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1

応募クリック数

0

模擬応募者数

0

スクラップ

0

NVIDIAについて

NVIDIA

NVIDIA

Public

A computing platform company operating at the intersection of graphics, HPC, and AI.

10,001+

従業員数

Santa Clara

本社所在地

$4.57T

企業価値

レビュー

4.1

10件のレビュー

ワークライフバランス

3.5

報酬

4.2

企業文化

4.3

キャリア

4.5

経営陣

4.0

75%

友人に勧める

良い点

Great culture and supportive environment

Smart colleagues and excellent people

Cutting-edge technology and learning opportunities

改善点

Team-dependent experience and outcomes

Work-life balance issues with long hours

Politics and influence over competence

給与レンジ

73件のデータ

Junior/L3

Mid/L4

Junior/L3 · Analyst

7件のレポート

$170,275

年収総額

基本給

$130,981

ストック

-

ボーナス

-

$155,480

$234,166

面接体験

7件の面接

難易度

3.1

/ 5

体験

ポジティブ 0%

普通 86%

ネガティブ 14%

面接プロセス

1

Application Review

2

Recruiter Screen

3

Online Assessment

4

Technical Interview

5

System Design Interview

6

Team Review

よくある質問

Coding/Algorithm

System Design

Technical Knowledge

Behavioral/STAR