RELOCATION ASSISTANCE: Relocation assistance may be available

CLEARANCE REQUIRED FOR START: Yes

CLEARANCE TYPE: Secret

TRAVEL: Yes, 10% of the Time

Description

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

Northrop Grumman's Defense Systems is currently seeking a **FPGA Digital Design Engineer (Level 02)**for our tactical missile system development and production programs at Advanced Weapons located in **Northridge, CA. ** This role will be 100% on site with no remote opportunities available. A DoD Secret clearance is required to start.

Roles and Responsibilities:

• Responsible for research, design, and development for complex high speed digital designs.

• Support the implementation of digital FPGA hardware architecture and algorithms.

• Collaborate with Systems Engineering to ensure firmware design meets system level requirements, review designs and analysis.

Basic Qualifications for FPGA Digital Design Engineer 2:

• Bachelor’s degree in electrical engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline with 2 years of digital verification engineering experience using industry standard simulation tools; 0 years with an MS degree;

• Must have hands on FPGA design experience with VHDL within the past 3 years

• Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs

• Experience with Electronic Design Automation (EDA) Tools: Vivado and Questa Sim.

• Must have an active DoD Secret Clearance to start.

Preferred Qualifications for FPGA Digital Design Engineer 2:

• Experience with DSP, MATLAB, and Simu Link

• Knowledgeable in FPGA physical constraints and achieving timing closure.

• Experience with board or system level debug using test equipment such as oscilloscopes and logic analyzers.

• Generation of Test Benches and support of formal VHDL Verification

Primary Level Salary Range: $101,000.00 - $151,400.00

The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.

Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.

Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.