Job Family Description

Direct Production (DP) covers the overall manufacturing operations of Nokia. Contains the direction and monitoring of business' operational processes concerning production, man and machinery performance, and maintenance, as well as related cost controls, quality, and packaging tasks.

Nokia Corporation (Former: Infinera Corporation) in Sunnyvale, CA has a wafer fab which carries out R&D and production of state-of-the-art indium phosphide (InP) photonic integrated circuit (PIC) semiconductor chips. The wafer fab operates 24x7 and provides the opportunity for integration technicians to improve quality and reduce defects in our fab processes. Nokia’s fab processes include photolithography, wet etch, plasma etch, metal deposition, and chemical vapor deposition. Integration engineers and technicians have an exciting career in advancing the performance and yield of Nokia’s current and future generations of high speed, optical networking, semiconductor devices. Nokia’s culture supports strong teamwork and excellent training by co-workers.

• At least 3 years of experience working in a modern semiconductor fab or in any other manufacturing facility which places a high premium on quality. Prefer 5+ years of experience.

Strong focus on quality and attention to detail

• Eager to learn and expand skill set

• Strong follow-up skills and problem-solving ability and drive

• Takes ownership for tasks and projects

• Team player with good communication skills, verbal and written

• Ability to organize data and keep track of several simultaneous projects and deadlines

• Able to use computer software to analyze and review complex data

• Indium phosphide or gallium arsenide experience is a plus, but not required

• Willing to work in a clean room environment (semiconductor fab)

• Ability to perform wafer inspections and failure analysis using metrology tool sets (CDSEM, microscope, profilometer, FLM) and other methods

• Ability to make engineering decisions under minimum supervision and support

• Troubleshoot challenging performance and yield issues in the wafer fab

Investigate the reason and root cause for lots being put on hold

• Assist with engineering tool quals

• Provide support for engineers with failure analysis – visual inspections, CD-SEM work, electrical IV sweeps, profilometer depth measurements, etc.

• Use Manufacturing Engineering System (MES) software to help with integration engineering activities – collect data, perform basic data analysis, generate Power Point reports, etc.

• Routine review of SPC charts and initial response for out-of-control events

• Coordinate and follow movement of qual and development lots through fab, assembly, and test areas

• Help to assure compliance with PIC product quality system

• Work Hours: Weekend shift. Compressed work week. Every Friday, Saturday, Sunday and every other Thursday, 6:00 AM – 6:00 PM. Time and one-half overtime pay for the last 3 and ½ hours each day worked. 15% Shift differential paid for Weekend shift.