Nokia’s Network Infrastructure group is at the heart of a revolution to bring more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise.

The Fixed Networks Division is one of the key divisions in Nokia focusing on making Ultra Broadband Access possible for all users in the world and system-on-chips (SoC’s) are at the heart of our systems.

To strengthen our SoC development team, our team is looking for experienced SoC design and validation engineers with a passion for System-On-Chip and embedded SW development.

The System-on-Chip design & validation engineer contributes to the architecture, design, integration, and validation of complex So Cs used in high-performance, low-power embedded systems. In this role, you will work closely with SoC architects, IP suppliers, firmware, and software teams to ensure functional correctness, performance, and robustness of SoC designs from concept through silicon bring-up.

This position combines hands-on RTL/system design with verification, validation, and debug, both in pre-silicon and post-silicon phases.

NIFN2026

You have:

You have:

• A master’s degree or PhD in Electrical Engineering, Computer Engineering or related field.
• Solid understanding of digital design principles and SoC architectures with at least 5 to 10 years of relevant SoC project execution experience
• Hands-on experience with RTL design and/or integration using System Verilog / Verilog / VHDL. Hands-on experience with SoC verification or validation methodologies. Familiarity with simulation and debug tools (e.g. Questa, VCS, ...)
• Strong debugging and problem-solving skills
• The willingness to accept and overcome challenges. You can think “out-of-the-box”.

It would be nice if you also had:

• Experience with UVM-based verification environments

• Knowledge of low-power design and power intent (UPF / CPF).

• Experience with emulation or FPGA prototyping platforms

• Experience with backend design, post-silicon validation and lab bring-up experience

• Familiarity with embedded software programming

• Scripting skills (Python, Tcl, Perl, ...) for automation and analysis

• You work closely with SoC architects on the system design and the ASIC or FPGA feasibility studies to come to the best possible system solution in terms of cost, area and power.

• You will work in an inspiring team atmosphere on the digital design implementation with hardware description languages like VHDL, Verilog or Systemverilog and will work with scripting languages like python and programming languages like C/C++ when appropriate.

• You define and review SoC-level interfaces, address maps, configuration registers and participate in design reviews where needed. You integrate third-party and internal IP blocks. You interface with third-party IP vendors for integration support and issue resolution.

• You support low-power design techniques (clock gating, power gating, ...) and participate in the power estimations of the design executing power simulations when appropriate. You will contribute to synthesis, place & route and static timing verification.

• You contribute to design reviews, validation reviews, and technical documentation. You support continuous improvement of SoC design, verification and validation methodologies. You collaborate with physical design (layout) teams to ensure timing, power, and area targets are met.

• You create and maintain testbenches, test scenarios, and regression environments. You perform functional verification using simulation, emulation, and/or FPGA prototyping. You analyse coverage metrics and close functional coverage gaps.

• You will get involved in the embedded software development for on-chip processors and will contribute to the C/C++ SW driver development which is required to shield the complex SoC from the higher software application layers.

• You work closely together with PCB hardware development engineers, SW development & test engineers to bring the complete product to the market on time and with the right quality. That means supporting silicon bring-up, lab validation, and characterization. You debug silicon issues using logic analyzers, trace tools, and on-chip debug features. You drive root-cause analysis and propose corrective actions where needed.