The successful candidate will drive innovative research, collaborating with Nokia Bell Labs and business units to advance optical subassemblies. They will define substrate materials, integration techniques, and assembly processes for next-generation optical systems, optimizing high-speed optoelectronic interfaces using EDA simulation tools.

• Ph.D. in Electrical Engineering or Physics with 2+ years of industry experience, or MSEE with 6+ years.
• Experience in designing and characterizing high-speed optoelectronic interfaces (drivers, TIAs, detectors, modulators).
• Expertise in Signal Integrity principles and 3D EM design, with simulation software (3DS CST, ANSYS HFSS).
• Knowledge of IC packaging materials, techniques, substrate design, and microelectronics assembly process flows.
• Familiarity with high-speed test & measurement equipment (network analyzer, waveform generator, oscilloscope).
• Strong technical writing skills for patent & publication, and excellent interpersonal communication.
• Knowledge of semiconductor fabrication processes is an asset.
• Experience with Python and scripting for design & automation is desirable.
• Perform leading research & development in optoelectronic interface and integrated subsystem design for high-speed optical networks.
• Drive research into novel EIC/PIC integration techniques and advanced substrate materials for packaging.
• Collaborate with Nokia Bell Labs researchers and business units to advance optical subassemblies.
• Define substrate materials, integration techniques, and assembly processes for next-gen optical sub-systems.
• Design and optimize high-speed optoelectronic interfaces using EDA simulation tools.
• Conduct high-frequency test & measurements with network analysis and wireline modulation formats.
• Possess strong interpersonal and technical writing skills for patent & publication purposes.