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Join our team as we continue to expand our product portfolio in the Data Center and Carrier Service Provider. The IP Routing Hardware organization is very flat - there are few levels of management between the Individual Contributor and the VP of Hardware. We are also very lean - each Engineer spends more time doing engineering work and less time on overhead. As a result, your work has high visibility, and your decisions directly impact product design.
DCN2026
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Minimum B.Sc or B.Eng in Electrical Engineering or Computer Engineering
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5 years of total work experience or post-graduate studies simulating high-speed Ser Des in PCB applications
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Expert in using Ansys HFSS or Dassault CST simulation tools
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Hands-on measurement skills with TDR/VNA equipment and oscilloscopes
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Excellent interpersonal and communication skills
It would be nice if you also had:
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Familiarity with Mentor Hyperlynx, HSpice, and Cadence Allegro
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Knowledge of PAM4 transmitter and receiver analog and digital technologies: FIR, CTLE, DFE, & FEC
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Experience in the theoretical aspects of EMC/EMI and ITU/IEEE/Bellcore telecommunications standards
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Programming/Scripting ability (C/Python/Matlab)
As a Signal Integrity Engineer, you will:
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Simulate ultra high-speed PCB channels (112G+ Ser Des rates) including connectors, breakouts, and via structures
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Provide signal integrity guidance to Digital Hardware Designers using simulated and empirical results
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Help design PCB test boards to corroborate simulations
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About Nokia

Nokia
PublicNokia Corporation is a Finnish multinational telecommunications, information technology, and consumer electronics corporation, originally established as a pulp mill in 1865.
10,001+
Employees
Espoo
Headquarters
Reviews
3.6
25 reviews
Work Life Balance
3.8
Compensation
2.7
Culture
3.9
Career
2.9
Management
2.8
65%
Recommend to a Friend
Pros
Good work-life balance and flexible schedules
Strong company culture and nice people
Excellent benefits and learning opportunities
Cons
Low salary and compensation issues
Limited growth and career opportunities
Frequent leadership changes and lack of direction
Salary Ranges
22 data points
Junior/L3
Mid/L4
Junior/L3 · Global 1830 TAC Engineer
1 reports
$141,314
total / year
Base
$108,703
Stock
-
Bonus
-
$141,314
$141,314
Interview Experience
7 interviews
Difficulty
2.7
/ 5
Duration
14-28 weeks
Offer Rate
57%
Experience
Positive 14%
Neutral 72%
Negative 14%
Interview Process
1
Application Review
2
Technical Phone Screen
3
Technical Interview
4
HR Interview
5
Team Matching
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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