採用
必須スキル
Python
Job Description:
Join our dynamic FPGA (Field Programmable Gate Array) Business Unit as a Technical Staff SOC Architecture Engineer. We are at the forefront of developing SOC FPGA compute platforms for a diverse range of low-power applications, including smart embedded vision, industrial IoT, access/gateways/aggregation networks, and compute platforms for aerospace and defense. As an SOC Architect, you will collaborate with a team of highly motivated architects and senior designers to define and deliver next-generation, power-optimized FPGA solutions.
Key Responsibilities:
- Lead technical diligence and perform trade-off analysis of product requirements during the Product Concept Phase, translating them into actionable Design Requirements for the Product Definition Phase.
- Collaborate with Embedded Software teams to define optimal Hardware Abstraction Layer (HAL) and driver interfaces, ensuring seamless integration and performance.
- Develop detailed microarchitectural specifications, ensuring accurate capture of design intent, identifying technical gaps, and proposing effective remedies.
- Drive RTL implementation and partner with Logic Verification and ASIC Implementation teams through synthesis and DFT insertion.
- Lead discussions with CPU and IP vendors to shape future features and requirements.
- Develop and utilize techniques and tools for SOC benchmarking and bandwidth analysis, delivering optimized system solutions.
- Work cross-functionally with Functional Verification, ASIC Implementation, and Embedded Software teams across multiple geographical locations.
- Oversee all facets of interconnect to FPGA fabric, associated peripherals, and IO resources, extending beyond the SOC boundary.
Qualifications
Requirements/Qualifications:
Minimum Qualifications:
- Master’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 10–15 years of industry experience in SOC architecture and design.
- Proven experience developing ARM M-Class or RISC-V Embedded SOC architectures.
- Expertise in SOC advanced interconnect, AMBA, SOC peripherals, and DDR memory.
- Proficiency in developing microarchitecture specifications, RTL design, and logic simulations.
- Hands-on experience with Verilog, Cadence/Synopsys/Siemens simulation environments, synthesis, and DFT insertion EDA tools.
- Strong scripting skills in CSH/BASH, PERL, or Python.
- Demonstrated adaptability and flexibility in a fast-paced, evolving environment.
- Excellent verbal and written communication skills, with the ability to convey complex technical concepts to cross-functional teams.
- Proactive problem-solving attitude and a willingness to take initiative in addressing technical challenges.
Preferred Qualifications:
- Experience in SOC architecture performance analysis, tools, and simulators at various abstraction levels (Cycle Accurate, TLM, and/or Functional).
- Familiarity with UVM and functional coverage methodology.
- Experience with vector processing micro-architectures is a major plus.
Additional Information
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Handling, Hearing, Other, Seeing, Supervises Others, Talking, Works Alone, Works Around Others
Physical Requirements:
10% walking, 10% standing, 80% sitting; 100% in doors; Usual business hours
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in California, is $88,000 - $232,000.
Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
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Microchipについて

Microchip
BootstrappedMicrochip Technology Incorporated is an American publicly traded semiconductor corporation that manufactures microcontroller, mixed-signal, analog, and Flash-IP integrated circuits.
1-50
従業員数
Genova
本社所在地
レビュー
1.5
10件のレビュー
ワークライフバランス
2.0
報酬
1.5
企業文化
1.8
キャリア
1.7
経営陣
2.2
15%
友人に勧める
良い点
Good management and approachable leadership
Productive work environment and meeting quotas
Supportive coworkers and fellow employees
改善点
Very low pay and below industry standard compensation
Poor upper management and lack of transparency
Frequent layoffs and job insecurity
給与レンジ
48件のデータ
Mid/L4
Mid/L4 · Data Scientist II
1件のレポート
$97,500
年収総額
基本給
$75,000
ストック
-
ボーナス
-
$97,500
$97,500
面接体験
3件の面接
難易度
3.3
/ 5
期間
14-28週間
体験
ポジティブ 0%
普通 67%
ネガティブ 33%
面接プロセス
1
Application Review
2
Phone/Recruiter Screen
3
Technical Assessment
4
Technical Interviews
5
HR/Personality Assessment
6
Panel Interview
よくある質問
Technical Knowledge
Hardware/Circuit Design
Behavioral/STAR
Security Fundamentals
Problem Solving
ニュース&話題
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